TH58NVG5S0FTA20 Datasheet, PDF (69/73 Pages) Toshiba Semiconductor – 32 GBIT (4G × 8 BIT) CMOS NAND E2PROM

TOSHIBA CONFIDENTIAL TH58NVG5S0FTA20
(14) Failure phenomena for Program and Erase operations
The device may fail during a Program or Erase operation.
The following possible failure modes should be considered when implementing a highly reliable system.
FAILURE MODE
Block
Erase Failure
Page
Programming Failure
Single Bit ^{Programming Failure}
“1 to 0”
DETECTION AND COUNTERMEASURE SEQUENCE
Status Read after Erase → Block Replacement
Status Read after Program → Block Replacement
ECC
• ECC: Error Correction Code. 4 bit correction per 528Bytes is necessary.
• Block Replacement
Program
Error occurs
Buffer
memory
Block A
When an error happens in Block A, try to reprogram the
data into another Block (Block B) by loading from an
external buffer. Then, prevent further system accesses
to Block A ( by creating a bad block table or by using
another appropriate scheme).
Block B
Erase
When an error occurs during an Erase operation, prevent future accesses to this bad block
(again by creating a table within the system or by using another appropriate scheme).
(15) Do not turn off the power before write/erase operation is complete. Avoid using the device when the battery
is low. Power shortage and/or power failure before write/erase operation is complete will cause loss of data
and/or damage to data.
(16) The number of valid blocks is on the basis of single plane operations, and this may be decreased with two
plane operations.
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2010-12-13C