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TH58NVG5S0FTA20 Datasheet, PDF (60/73 Pages) Toshiba Semiconductor – 32 GBIT (4G × 8 BIT) CMOS NAND E2PROM
TOSHIBA CONFIDENTIAL
An application example with multiple devices is shown in the figure below.
TH58NVG5S0FTA20
CE1
CLE
ALE
Device
WE
1
RE
CE 2
Device
2
CE3
Device
3
CEN
Device
N
CEN + 1
Device
N+1
I/O1
to I/O8
RY / BY
RY / BY
Busy
CLE
ALE
WE
CE1
CEN
RE
I/O
70h
70h
Status on Device 1
Status on Device N
System Design Note: If the RY / BY pin signals from multiple devices are wired together as shown in the
diagram, the Status Read function can be used to determine the status of each individual device.
Reset
The Reset mode stops all operations. For example, in case of a Program or Erase operation, the internally
generated voltage is discharged to 0 volt and the device enters the Wait state.
Reset during a Cache Program/Page Copy may not just stop the most recent page program but it may also
stop the previous program to a page depending on when the FF reset is input.
The response to a “FFh” Reset command input during the various device operations is as follows:
When a Reset (FFh) command is input during programming
80
10
FF
00
Internal VPP
RY / BY
tRST (max 30 µs)
60
2010-12-13C