TH58NVG5S0FTA20 Datasheet, PDF (65/73 Pages) Toshiba Semiconductor – 32 GBIT (4G × 8 BIT) CMOS NAND E2PROM

TOSHIBA CONFIDENTIAL TH58NVG5S0FTA20
(10) Note regarding the WP signal
The Erase and Program operations are automatically reset when WP goes Low. The operations are
enabled and disabled as follows:
Enable Programming
WE
DIN
80
10
WP
RY / BY
t_WW (100 ns MIN)
Disable Programming
WE
DIN
80
10
WP
RY / BY
t_WW (100 ns MIN)
Enable Erasing
WE
DIN
60
D0
WP
RY / BY
t_WW (100 ns MIN)
Disable Erasing
WE
DIN
60
D0
WP
RY / BY
t_WW (100 ns MIN)
65
2010-12-13C