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TH58NVG5S0FTA20 Datasheet, PDF (49/73 Pages) Toshiba Semiconductor – 32 GBIT (4G × 8 BIT) CMOS NAND E2PROM
TOSHIBA CONFIDENTIAL TH58NVG5S0FTA20
D
8C
Address input Data input
11
8C
Address input Data input
15
E
Address
Address
CA0 to CA12, PA0 to PA18
CA0 to CA12, PA0 to PA18
(Page M1 ; District 0)
(Page N1 ; District 1)
D
RY/BY
E
tDCBSYW1
tDCBSYW2
E
60
Address input
60
Address input
3A
00
Address input
05
Address input
E0
Data output
F
Address
PA0 to PA18
(Page m63 ; District 0)
Address
PA0 to PA18
(Page n63 ; District 1)
Address
CA0 to CA12, PA0 to PA18
(Page m63)
Address
CA0 to CA12
(Col = 0)
E
F
RY/BY
tDCBSYR2
F
00
Address input
05
Address input
E0
Data output
8C
Address input Data input
11
G
Address
CA0 to CA12, PA0 to PA18
(Page n63)
Address
CA0 to CA12
(Col = 0)
Address
CA0 to CA12, PA0 to PA18
(Page M63 ; District 0)
RY/BY F
G
tDCBSYW1
G
G
RY/BY
8C
Address input Data input
Address
CA0 to CA12, PA0 to PA18
(Page N63 ; District 1)
10
tPROG (*1)
(*1) tPROG: Since the last page programming by 10h command is initiated after the previous cache
program, the tPROG* during cache programming is given by the following equation.
tPROG = tPROG of the last page + tPROG of the previous page-A
A = (command input cycle + address input cycle + data output/input cycle time of the last page)
If “A” exceeds the tPROG of previous page, tPROG of the last page is tPROG max.
Note)
This operation needs to be executed within each District.
Data input is required only if previous data output needs to be altered.
If the data has to be changed, locate the desired address with the column and page address input after
the 8Ch command, and change only the data that needs be changed.
If the data does not have to be changed, data input cycles are not required.
Make sure WP is held to High level when Multi Page Copy (2) operation is performed.
Also make sure the Multi Page Copy operation is terminated with 8Ch-10h command sequence
49
2010-12-13C