TH58NVG5S0FTA20 Datasheet, PDF (2/73 Pages) Toshiba Semiconductor – 32 GBIT (4G × 8 BIT) CMOS NAND E2PROM

TOSHIBA CONFIDENTIAL
PIN ASSIGNMENT (TOP VIEW)
TH58NVG5S0FTA20
PINNAMES
×8
NC 1
NC 2
NC 3
NC 4
NC 5
RY / BY 2 6
RY / BY 1 7
RE 8
CE 1 9
CE 2 10
NC 11
V_CC 12
V_SS 13
NC 14
NC 15
CLE 16
ALE 17
WE 18
WP 19
NC 20
NC 21
NC 22
NC 23
NC 24
TH58NVG5S0FTA20
×8
48 NC
47 NC
46 NC
45 NC
44 I/O8
43 I/O7
42 I/O6
41 I/O5
40 NC
39 PSL
38 NC
37
V_CC
36
V_SS
35 NC
34 NC
33 NC
32 I/O4
31 I/O3
30 I/O2
29 I/O1
28 NC
27 NC
26 NC
25 NC
I/O1 to I/O8
CE 1
CE 2
WE
RE
CLE
ALE
PSL
WP
RY/BY 1
RY/BY 2
V_CC
V_SS
I/O port
Chip enable (Chip A,B)
Chip enable (Chip C,D)
Write enable
Read enable
Command latch enable
Address latch enable
Power on select
Write protect
Ready/Busy (Chip A,B)
Ready/Busy (Chip C,D)
Power supply
Ground
2
2010-12-13C