COP8SGE5_14 Datasheet, PDF (66/82 Pages) Texas Instruments – COP8SG Family 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
SNOS516E – JANUARY 2000 – REVISED APRIL 2013
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
RPND
X
X
LD
LD
LD
LD
LD
X
X
LD
LD
LD
CLR
INC
DEC
LAID
DCOR
RRC
RLC
SWAP
SC
RC
IFC
IFNC
POP
PUSH
VIS
JMPL
JMP
JP
JSRL
JSR
JID
RET
RETSK
A,Meml
#
Reg
#,Mem
#,Mem
#,Mem
A,Mem
A,[X]
A,Meml
A,[X]
B,Imm
Mem,Imm
Reg,Imm
A, [B ±]
A, [X ±]
A, [B±]
A, [X±]
[B±],Imm
A
A
A
A
A
A
A
A
A
Addr.
Addr.
Disp.
Addr.
Addr.
IF Greater Than
If B Not Equal
Decrement Reg., Skip if Zero
Set BIT
Reset BIT
IF BIT
Reset PeNDing Flag
EXchange A with Memory
EXchange A with Memory [X]
LoaD A with Memory
LoaD A with Memory [X]
LoaD B with Immed.
LoaD Memory Immed.
LoaD Register Memory Immed.
EXchange A with Memory [B]
EXchange A with Memory [X]
LoaD A with Memory [B]
LoaD A with Memory [X]
LoaD Memory [B] Immed.
CLeaR A
INCrement A
DECrement A
Load A InDirect from ROM
Decimal CORrect A
Rotate A Right thru C
Rotate A Left thru C
SWAP nibbles of A
Set C
Reset C
IF C
IF Not C
POP the stack into A
PUSH A onto the stack
Vector to Interrupt Service Routine
Jump absolute Long
Jump absolute
Jump relative short
Jump SubRoutine Long
Jump SubRoutine
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETI
INTR
NOP
RETurn from Interrupt
Generate an Interrupt
No OPeration
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Compare A and Meml, Do next if A > Meml
Do next if lower 4 bits of B ≠ Imm
Reg←Reg − 1, Skip if Reg = 0
1 to bit, Mem (bit = 0 to 7 immediate)
0 to bit, Mem
If bit #, A or Mem is true do next instruction
Reset Software Interrupt Pending Flag
A↔Mem
A↔[X]
A←Meml
A←[X]
B←Imm
Mem←Imm
Reg←Imm
A↔[B], (B←B ±1)
A↔[X], (X←X ±1)
A←[B], (B←B ±1)
A←[X], (X←X±1)
[B]←Imm, (B←B±1)
A←0
A←A + 1
A←A − 1
A←ROM (PU,A)
A←BCD correction of A (follows ADC, SUBC)
C→A7→…→A0→C
C←A7←…←A0←C, HC←A0
A7…A4↔A3…A0
C←1, HC←1
C←0, HC←0
IF C is true, do next instruction
If C is not true, do next instruction
SP←SP + 1, A←[SP]
[SP]←A, SP←SP − 1
PU←[VU], PL←[VL]
PC←ii (ii = 15 bits, 0 to 32k)
PC9…0←i (i = 12 bits)
PC←PC + r (r is −31 to +32, except 1)
[SP]←PL, [SP−1]←PU,SP−2, PC←ii
[SP]←PL, [SP−1]←PU,SP−2, PC9…0←i
PL←ROM (PU,A)
SP + 2, PL←[SP], PU←[SP−1]
SP + 2, PL←[SP],PU←[SP−1],
skip next instruction
SP + 2, PL ←[SP],PU←[SP−1],GIE←1
[SP]←PL, [SP−1]←PU, SP−2, PC←0FF
PC←PC + 1
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