COP8SGE5_14 Datasheet, PDF (18/82 Pages) Texas Instruments – COP8SG Family 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
SNOS516E – JANUARY 2000 – REVISED APRIL 2013
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DATA MEMORY SEGMENT RAM EXTENSION
Data memory address 0FF is used as a memory mapped location for the Data Segment Address Register (S).
The data store memory is either addressed directly by a single byte address within the instruction, or indirectly
relative to the reference of the B, X, or SP pointers (each contains a single-byte address). This single-byte
address allows an addressing range of 256 locations from 00 to FF hex. The upper bit of this single-byte address
divides the data store memory into two separate sections as outlined previously. With the exception of the RAM
register memory from address locations 00F0 to 00FF, all RAM memory is memory mapped with the upper bit of
the single-byte address being equal to zero. This allows the upper bit of the single-byte address to determine
whether or not the base address range (from 0000 to 00FF) is extended. If this upper bit equals one
(representing address range 0080 to 00FF), then address extension does not take place. Alternatively, if this
upper bit equals zero, then the data segment extension register S is used to extend the base address range
(from 0000 to 007F) from XX00 to XX7F, where XX represents the 8 bits from the S register. Thus the 128-byte
data segment extensions are located from addresses 0100 to 017F for data segment 1, 0200 to 027F for data
segment 2, etc., up to FF00 to FF7F for data segment 255. The base address range from 0000 to 007F
represents data segment 0.
Figure 16 illustrates how the S register data memory extension is used in extending the lower half of the base
address range (00 to 7F hex) into 256 data segments of 128 bytes each, with a total addressing range of 32
kbytes from XX00 to XX7F. This organization allows a total of 256 data segments of 128 bytes each with an
additional upper base segment of 128 bytes. Furthermore, all addressing modes are available for all data
segments. The S register must be changed under program control to move from one data segment (128 bytes)
to another. However, the upper base segment (containing the 16 memory registers, I/O registers, control
registers, etc.) is always available regardless of the contents of the S register, since the upper base segment
(address range 0080 to 00FF) is independent of data segment extension.
Figure 16. RAM Organization
The instructions that utilize the stack pointer (SP) always reference the stack as part of the base segment
(Segment 0), regardless of the contents of the S register. The S register is not changed by these instructions.
Consequently, the stack (used with subroutine linkage and interrupts) is always located in the base segment. The
stack pointer will be initialized to point at data memory location 006F as a result of reset.
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