COP8SGE5_14 Datasheet, PDF (58/82 Pages) Texas Instruments – COP8SG Family 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
SNOS516E – JANUARY 2000 – REVISED APRIL 2013
Address
S/ADD REG
xxBE
xxBF
xxC0
xxC1
xxC2
xxC3
xxC4
xxC5
xxC6
xxC7
xxC8
xxC9
xxCA
xxCB to xxCF
xxD0
xxD1
xxD2
xxD3
xxD4
xxD5
xxD6
xxD7
xxD8
xxD9
xxDA
xxDB
xxDC
xxDD to xxDF
xxE0 to xxE5
xxE6
xxE7
xxE8
xxE9
xxEA
xxEB
xxEC
xxED
xxEE
xxEF
xxF0 to FB
xxFC
xxFD
xxFE
xxFF
0100–017F
0200–027F
0300–037F
Contents ⁽¹⁾
UART Prescale Select Register (Reg:PSR)
Reserved for UART
Timer T2 Lower Byte
Timer T2 Upper Byte
Timer T2 Autoload Register T2RA Lower Byte
Timer T2 Autoload Register T2RA Upper Byte
Timer T2 Autoload Register T2RB Lower Byte
Timer T2 Autoload Register T2RB Upper Byte
Timer T2 Control Register
WATCHDOG Service Register (Reg:WDSVR)
MIWU Edge Select Register (Reg:WKEDG)
MIWU Enable Register (Reg:WKEN)
MIWU Pending Register (Reg:WKPND)
Reserved
Port L Data Register
Port L Configuration Register
Port L Input Pins (Read Only)
Reserved for Port L
Port G Data Register
Port G Configuration Register
Port G Input Pins (Read Only)
Port I Input Pins (Read Only) (Actually reads Port F input pins)
Port C Data Register
Port C Configuration Register
Port C Input Pins (Read Only)
Reserved for Port C
Port D
Reserved for Port D
Reserved for EE Control Registers
Timer T1 Autoload Register T1RB Lower Byte
Timer T1 Autoload Register T1RB Upper Byte
ICNTRL Register
MICROWIRE/PLUS Shift Register
Timer T1 Lower Byte
Timer T1 Upper Byte
Timer T1 Autoload Register T1RA Lower Byte
Timer T1 Autoload Register T1RA Upper Byte
CNTRL Control Register
PSW Register
On-Chip RAM Mapped as Registers
X Register
SP Register
B Register
S Register
On-Chip 128 RAM Bytes
On-Chip 128 RAM Bytes (Reads as undefined data on COP8SGE)
On-Chip 128 RAM Bytes (Reads as undefined data on COP8SGE)
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Product Folder Links: COP8SGE5 COP8SGE7 COP8SGH5 COP8SGK5 COP8SGR5 COP8SGR7