COP8SGE5_14 Datasheet, PDF (61/82 Pages) Texas Instruments – COP8SG Family 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

www.ti.com
COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
SNOS516E – JANUARY 2000 – REVISED APRIL 2013
Reg/Data
Memory
B Pointer
Contents
Before
12 Hex
Contents
After
07 Hex
Indirect from Program Memory. This is a special case of an indirect instruction that allows access to data
tables stored in program memory. In the “Load Accumulator Indirect” (LAID) instruction, the upper and lower
bytes of the Program Counter (PCU and PCL) are used temporarily as a pointer to program memory. For
purposes of accessing program memory, the contents of the Accumulator and PCL are exchanged. The data
pointed to by the Program Counter is loaded into the Accumulator, and simultaneously, the original contents of
PCL are restored so that the program can resume normal execution.
Example: Load Accumulator Indirect
LAID
Reg/Data
Memory
PCU
PCL
Accumulator
Memory Location
041F Hex
Contents
Before
04 Hex
35 Hex
1F Hex
25 Hex
Contents
After
04 Hex
36 Hex
25 Hex
25 Hex
Tranfer-of-Control Addressing Modes
Program instructions are usually executed in sequential order. However, Jump instructions can be used to
change the normal execution sequence. Several transfer-of-control addressing modes are available to specify
jump addresses.
A change in program flow requires a non-incremental change in the Program Counter contents. The Program
Counter consists of two bytes, designated the upper byte (PCU) and lower byte (PCL). The most significant bit of
PCU is not used, leaving 15 bits to address the program memory.
Different addressing modes are used to specify the new address for the Program Counter. The choice of
addressing mode depends primarily on the distance of the jump. Farther jumps sometimes require more
instruction bytes in order to completely specify the new Program Counter contents.
The available transfer-of-control addressing modes are:
• Jump Relative
• Jump Absolute
• Jump Absolute Long
• Jump Indirect
The transfer-of-control addressing modes are described below. Each description includes an example of a Jump
instruction using a particular addressing mode, and the effect on the Program Counter bytes of executing that
instruction.
Jump Relative. In this 1-byte instruction, six bits of the instruction opcode specify the distance of the jump from
the current program memory location. The distance of the jump can range from −31 to +32. A JP+1 instruction is
not allowed. The programmer should use a NOP instead.
Example: Jump Relative
JP 0A
Copyright © 2000–2013, Texas Instruments Incorporated
Submit Documentation Feedback
61
Product Folder Links: COP8SGE5 COP8SGE7 COP8SGH5 COP8SGK5 COP8SGR5 COP8SGR7