COP8SGE5_14 Datasheet, PDF (35/82 Pages) Texas Instruments – COP8SG Family 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

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COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
SNOS516E – JANUARY 2000 – REVISED APRIL 2013
USART
Each device contains a full-duplex software programmable USART. The USART (Figure 30) consists of a
transmit shift register, a receive shift register and seven addressable registers, as follows: a transmit buffer
register (TBUF), a receiver buffer register (RBUF), a USART control and status register (ENU), a USART receive
control and status register (ENUR), a USART interrupt and clock source register (ENUI), a prescaler select
register (PSR) and baud (BAUD) register. The ENU register contains flags for transmit and receive functions; this
register also determines the length of the data frame (7, 8 or 9 bits), the value of the ninth bit in transmission,
and parity selection bits. The ENUR register flags framing, data overrun and parity errors while the USART is
receiving.
Other functions of the ENUR register include saving the ninth bit received in the data frame, enabling or disabling
the USART's attention mode of operation and providing additional receiver/transmitter status information via
RCVG and XMTG bits. The determination of an internal or external clock source is done by the ENUI register, as
well as selecting the number of stop bits and enabling or disabling transmit and receive interrupts. A control flag
in this register can also select the USART mode of operation: asynchronous or synchronous.
Figure 30. USART Block Diagram
USART CONTROL AND STATUS REGISTERS
The operation of the USART is programmed through three registers: ENU, ENUR and ENUI.
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