COP8SGE5_14 Datasheet, PDF (34/82 Pages) Texas Instruments – COP8SG Family 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
SNOS516E – JANUARY 2000 – REVISED APRIL 2013
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An example may serve to clarify this procedure. Suppose we wish to change the edge select from positive (low
going high) to negative (high going low) for L Port bit 5, where bit 5 has previously been enabled for an input
interrupt. The program would be as follows:
RBIT 5, WKEN ; Disable MIWU
SBIT 5, WKEDG ; Change edge polarity
RBIT 5, WKPND ; Reset pending flag
SBIT 5, WKEN ; Enable MIWU
If the L port bits have been used as outputs and then changed to inputs with Multi-Input Wakeup/Interrupt, a
safety procedure should also be followed to avoid wakeup conditions. After the selected L port bits have been
changed from output to input but before the associated WKEN bits are enabled, the associated edge select bits
in WKEDG should be set or reset for the desired edge selects, followed by the associated WKPND bits being
cleared.
This same procedure should be used following reset, since the L port inputs are left floating as a result of reset.
The occurrence of the selected trigger condition for Multi-Input Wakeup is latched into a pending register called
WKPND. The respective bits of the WKPND register will be set on the occurrence of the selected trigger edge on
the corresponding Port L pin. The user has the responsibility of clearing these pending flags. Since WKPND is a
pending register for the occurrence of selected wakeup conditions, the device will not enter the HALT mode if
any Wakeup bit is both enabled and pending. Consequently, the user must clear the pending flags before
attempting to enter the HALT mode.
WKEN and WKEDG are all read/write registers, and are cleared at reset. WKPND register contains random
value after reset.
Figure 29. Multi-Input Wake Up Logic
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