DS90UH940-Q1 Datasheet, PDF (63/87 Pages) Texas Instruments – FPD-Link III to CSI-2 Deserializer

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DS90UH940-Q1
SNLS478A – NOVEMBER 2014 – REVISED JANUARY 2016
Register Maps (continued)
ADD
(hex)
0x52
Register
Name
CML
OUTPUT
CTL1
0x56
CML
OUTPUT
ENABLE
0x57
CML
OUTPUT
CTL2
Table 12. Serial Control Bus Registers (continued)
Bit(s) Function
Type
7
CML CHANNEL RW
SELECT 1
6:0 RESERVED
RW
7:4 RESERVED
RW
3
CMLOUT
RW
ENABLE
2:0 RESERVED
RW
7:3 RESERVED
RW
2:1 CML CHANNEL RW
SELECT 2
0
RESERVED
RW
Default
Description
Value (hex)
0
Selects between PORT0 and PORT1 to output onto CMLOUT±.
0: Recovered forward channel data from RIN0± is output on
CMLOUT±
1: Recovered forward channel data from RIN1± is output on
CMLOUT±
CMLOUT driver must be enabled by setting 0x56[3] = 1.
Note: This bit must match 0x57[2:1] setting for PORT0 or
PORT1.
0
Reserved
0
Reserved
0
Enable CMLOUT± Loop-through Driver
0: Disabled (Default)
1: Enabled
0
Reserved
0
Reserved
0
Selects between PORT0 and PORT1 to output onto CMLOUT±.
01: Recovered forward channel data from RIN0± is output on
CMLOUT±
10: Recovered forward channel data from RIN1± is output on
CMLOUT±
CMLOUT driver must be enabled by setting 0x56[3] = 1.
Note: This must match 0x52[7] setting for PORT0 or PORT1.
0
Reserved
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