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DS90UH940-Q1 Datasheet, PDF (57/87 Pages) Texas Instruments – FPD-Link III to CSI-2 Deserializer
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DS90UH940-Q1
SNLS478A – NOVEMBER 2014 – REVISED JANUARY 2016
Register Maps (continued)
ADD
(hex)
0x23
Register
Name
RX Mode
Status
Table 12. Serial Control Bus Registers (continued)
Bit(s) Function
7
RX RGB
CHECKSUM
6
BC FREQ
SELECT
5
AUTO_I2S
4
BC_HS_CTL
3
COAX_MODE
2
REPEATER_
MODE
1
RESERVED
0
RESERVED
Type
RW
RW
RW
RW
RW
RW
RW
RW
Default
Description
Value (hex)
0
RX RGB Checksum Enable
Setting this bit enables the Receiver to validate a one-byte
checksum following each video line. Checksum failures are
reported in the HDCP_STS register.
0
Back Channel Frequency Select
0: Divide-by-4 frequency based on the internal oscillator
1: Divide-by-2 frequency based on the internal oscillator
This bit will be ignored if BC_HIGH_SPEED is set to a 1. Note
that changing this setting will result in some errors on the back
channel for a short period of time. If set over the control
channel, the Serializer should first be programmed to Auto-Ack
operation (Serializer register 0x03, bit 5) to avoid a control
channel timeout due to lack of response from the Deserializer.
1
Auto I2S
Determine I2S mode from the AUX data codes.
Strap
Back-Channel High-Speed control
Enables high-speed back-channel at 20Mbps.
This bit will override the BC_FREQ_SELECT setting.
Note that changing this setting will result in some errors on the
back channel for a short period of time. If set over the control
channel, the Serializer should first be programmed to Auto-Ack
operation (Serializer register 0x03, bit 5) to avoid a control
channel timeout due to lack of response from the Deserializer.
BC_HIGH_SPEED is loaded from the MODE_SEL1 pin strap
options.
Strap
Coax Mode
Configures the FPD3 Receiver for operation over Coax or STP
cabling:
0 : Shielded Twisted pair (STP)
1 : Coax
Coax Mode is loaded from the MODE_SEL1 pin strap options.
Strap
Repeater Mode
Indicates device is strapped to repeater mode. Repeater Mode
is loaded from the MODE_SEL1 pin strap options.
0
Reserved
0
Reserved
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