English
Language : 

LM98640QML-SP Datasheet, PDF (6/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output
LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings(1)(2)
PARAMETER
MIN
MAX
UNIT
Supply Voltage (VDD33)
4.2
V
Supply Voltage (VDD18)
2.35
V
Voltage on any VDD33 Input Pin
(Not to exceed 4.2V)
-0.3
VDD33 + 0.3
V
Voltage on any VDD33 Output Pin
(Not to exceed 4.2V)
-0.3
VDD33 + 0.3
V
Voltage on any VDD18 Input or Output Pin (33 to 52)
(Not to exceed 2.35V)
-0.3
VDD18 + 0.3
V
Input Current at any pin other than Supply Pins(3)
±25
mA
Package Input Current (except Supply Pins)(3)
±50
mA
Maximum Junction Temperature (TA)
150
°C
Storage Temperature
-65
+150
°C
(1) All voltages are measured with respect to VSS = 0V, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions. Operation of the device beyond the Operating Ratings is not
recommended.
(3) When the input voltage (VIN) at any pin exceeds the power supplies (VIN < VSS or VIN > VDD33), the current at that pin should be
limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can simultaneously safely exceed the
power supplies with an input current of 25 mA to two.
6.2 ESD Ratings(1)
V(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(2)
Charged-device model (CDM), per JEDEC specification JESD22-
C101 (3)
VALUE
±2500
±250
UNIT
V
(1) Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through 0Ω.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2500 V may actually have higher performance.
(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±250V may actually have higher performance.
6.3 Recommended Operating Conditions(1)
PARAMETER
Operating Temperature Range (TA)
VDD33 (2) (3)
VDD18(2) (3)
| VSS33 - VSS18 |
MIN
-55
+3.15
+1.7
MAX
+125
+3.45
+1.9
100
UNIT
°C
V
V
mV
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions. Operation of the device beyond the Operating Ratings is not
recommended.
(2) All voltages are measured with respect to VSS = 0V, unless otherwise specified.
(3) When the input voltage (VIN) at any pin exceeds the power supplies (VIN < VSS or VIN > VDD33), the current at that pin should be
limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can simultaneously safely exceed the
power supplies with an input current of 25 mA to two.
6
Submit Documentation Feedback
Copyright © 2010–2015, Texas Instruments Incorporated
Product Folder Links: LM98640QML-SP