LM98640QML-SP Datasheet, PDF (1/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output

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LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
LM98640QML Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output
1 Features
•1 ADC Resolution: 14-Bit
• ADC Sampling Rate: 5 MSPS to 40 MSPS
• Input Level: 2.85 V
• Supply Voltages 3.3Vand 1.8V Nominal
– 125 mW per channel at 15 MSPS
– 178 mW per channet at 40 MSPS
• CDS or S/H Processing for CCD or CIS sensors
– CDS or S/H Gain 0 dB or 6 dB
• Programmable Analog Gain for Each Channel
– 256 Steps; Range -3 dB to 18 dB
• Programmable Analog Offset Correction
– Fine and Coarse DAC Resolution ±8 Bits
– Fine DAC Range ±5 mV
– Coarse DAC Range ±250 mV
• Programmable Input Clamp Voltage
• Programmable Sample Edge: 1/64th Pixel Period
• INL at 15 MHz: ±3.5 LSB
• Noise Floor: -79 dB
• Crosstalk: -80 dB
• Operating Temp: -55°C to +125°C
• Single Event Latch-Up Free to 120 MeV-cm²/mg
• SEFI Free to 120 MeV-cm²/mg
• Total Ionizing Dose: 100 krad(Si)
INCLK+
INCLK-
OS1-
OS1+
VCLP
OS2+
OS2-
DLL
ATG
64
CDAC1[
COARSE
8:0] ₉ DAC
FDAC1[
8:0] ₉
FINE
DAC
Input Bias/
Clamping
-CDS
+S/H
VCLP
VCLP
Reference
DAC
5 Control[4:0]
Input Bias/
Clamping
+CDS
- ^S/H
FDAC2[
FINE
8:0] 9 DAC
CDAC2[
COARSE
8:0] 9 DAC
INTERNAL
REFERENCE
VBG
PGA1[7:0]
8
PGA
14 Bit
ADC
14
Digital
Control
and
Config
Registers
PGA2[7:0
]8
PGA
14 Bit
ADC
14
SERIALIZER
INTERNAL
REFERENCE
SEN
SCLK
SDI
SDO
TXFRM-
TXFRM+
TXOUT0-
TXOUT0+
TXOUT1-
TXOUT1+
TXOUT2-
TXOUT2+
TXOUT3-
TXOUT3+
TXCLK-
TXCLK+
CCD/CIS Sensor
Analog Front End
LM98640
SPI
Data Output
Image Processor/
ASIC
Sensor Drivers
CCD Timing
1
2 Applications
• Focal Plane Electronics
• Imaging Attitude Control Systems
• Factory Automation Vision Systems
• High-speed Document Scanner
• Multi- Function Peripherals
3 Description
The LM98640QML is a fully integrated, high
performance 14-Bit, 5 MSPS to 40 MSPS signal
processing solution for image processing
applications. The LM98640QML is radiation tolerant
up to a total ionizing dose of 100 krad allowing it to
be used in space imaging applications. Configuration
Registers are Single Event Functional Interrupt Free
up to 120 MeV-cm²/mg. The Serial LVDS Output
format performs well during single event exposure,
preventing data loss. The LM98640QML has an
adaptive power scaling feature to optimize power
consumption based on the operating frequency and
amount of gain required. High-speed signal
throughput is achieved with an innovative architecture
utilizing Correlated Double Sampling (CDS), typically
employed with CCD arrays, or Sample and Hold
(S/H) inputs (for CIS and CMOS image sensors). The
sampling edges are programmable to a resolution of
1/64th of a pixel period. Both the CDS and S/H have
a programmable gain of either 0dB or 6dB. The signal
paths utilize two ±8 bit offset correction DACs for
coarse and fine offset correction, and 8 bit
Programmable Gain Amplifiers (PGA) for each
channel. The PGA and offset DAC are programmed
independently allowing unique values of gain and
offset for each input. The signals are then routed to
two on chip 14-bit 40MHz high performance analog-
to-digital converters (ADC). The fully differential
processing channel provides exceptional noise
immunity, having a very low noise floor of -79dB at 1x
gain. The 14-bit ADCs have excellent dynamic
performance making the LM98640QML transparent in
the image reproduction chain.
Device Information⁽¹⁾
PART NUMBER
GRADE
PACKAGE
LM98640W-MLS Flight Grade 100 krad
64 Lead CQFP
LM96840W-MPR
Pre-Flight Engineering
Protoytpe
64 Lead CQFP
LM98640CVAL Ceramic Evaluation Board EVM
LM98640-MDR Flight Grade 100 krad
Die
LM98640-MDP
Pre-Flight Engineering
Protoytpe
Die
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.