LM98640QML-SP Datasheet, PDF (13/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output

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LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
LM98640QML Electrical Characteristics⁽¹⁾⁽²⁾ (continued)
The following specifications apply for VDD33 = 3.3V, VDD18 = 1.8V, C_L = 10pF, and f_INCLK = 40MHz unless otherwise
specified.
PARAMETER
TEST CONDITIONS
NOTES
SUB-
GROUPS
MIN TYP⁽³⁾ MAX UNIT
PGA SPECIFICATIONS
Gain Resolution
Monotonicity
See ⁽⁵⁾
1, 2, 3
8 Bits
Maximum Gain
CDS Gain = 1x
CDS Gain = 1x
1, 2, 3
1, 2, 3
7.92
17.99
8.3 8.78 V/V
18.4 18.88 dB
Minimum Gain
CDS Gain = 1x
CDS Gain = 1x
1, 2, 3
1, 2, 3
0.62
-4.15
0.64 0.66 V/V
-3.8 -3.54 dB
PGA Function
Gain (V/V) = (180/(277-PGA Code))
Gain (dB) = 20LOG10(180/(277-PGA Code))
Channel Matching
Minimum PGA Gain
Maximum PGA Gain
1, 2
95.2% 99.0%
3
94.0% 99.0%
1, 2
95.2% 99.0%
3
94.0% 99.0%
ADC SPECIFICATIONS
V_REFT
Top of Reference
V_REFB
Bottom of Reference
V_REFT - V_REFB Differential Reference Voltage
Overrange Output Code
1, 2, 3
2.0
1.0
1.0
16383 16383
V
V
V
Code
Underrange Output Code
1, 2, 3
0
0 Code
FULL CHANNEL PERFORMANCE SPECIFICATIONS
5 MHz
1, 2, 3
-1.03 0.78 1.53
5 MHz CDS
-1.20 1.0 2.24
DNL
Differential Non-Linearity
15 MHz
-1.02 0.78 1.58 LSB
25 MHz
-1.01 0.78 1.36
40 MHz
-1.03 0.78 1.45
5 MHz
1, 2, 3
-5.38 1.7 4.38
5 MHz CDS
-3.41 1.7 5.15
INL
Integral Non-Linearity
15 MHz
-3.45 1.9 3.49 LSB
25 MHz
-5.40 2.4 6.03
40 MHz
-9.9 6.0 7.34
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