LM98640QML-SP Datasheet, PDF (48/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output

LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
9 Layout
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9.1 Layout Guidelines
9.1.1 Power Planes
Power for the LM98640QML should be provided through a broad plane which is located on one layer adjacent to
the ground plane(s). Placing the power and ground planes on adjacent layers will provide low impedance
decoupling of the AFE supplies, especially at higher frequencies. The output of a linear regulator should feed into
the power plane through a low impedance multi-via connection. The power plane should be split into individual
power peninsulas near the AFE. Each peninsula should feed a particular power bus on the AFE, with decoupling
for that power bus connecting the peninsula to the ground plane near each power/ground pin pair. Using this
technique can be difficult on many printed circuit CAD tools. To work around this, zero ohm resistors can be used
to connect the power source net to the individual nets for the different AFE power buses. As a final step, the zero
ohm resistors can be removed and the plane and peninsulas can be connected manually after all other error
checking is completed.
9.1.2 Bypass Capacitors
The general recommendation is to have one 100nF capacitor for each power/ground pin pair. The capacitors
should be surface mount multi-layer ceramic chip capacitors.
9.1.3 Ground Plane
Grounding should be done using continuous full ground planes to minimize the impedance for all ground return
paths, and provide the shortest possible image/return path for all signal traces.
9.1.4 Thermal Management
The exposed pad on bottom of the package is attached to the back of the die to act as a heat sink. Connecting
this pad to the PCB ground planes with a low thermal resistance path is the best way to remove heat from the
AFE. This pad should also be connected to the ground planes through low impedance path for electrical
purposes.
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