LM98640QML-SP Datasheet, PDF (37/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output

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LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
Register Maps (continued)
Table 5. Configuration Registers (continued)
ADDRE
SS
(BINAR
Y)
REGISTER TITLE
(MNEMONIC)
BASELINE
(BINARY)
10 0110
Reserved
0000 0000
10 0111
Reserved
0000 0000
10 1000 DLL Configuration 0000 1111
10 1001
Reserved
0000 0000
10 1010
Reserved
0000 0000
10 1011
Reserved
0000 0000
10 1100
Reserved
0000 0000
10 1101
Reserved
0000 0000
10 1110
Reserved
0000 0000
10 1111
Reserved
0000 0000
DIGITAL CONFIGURATION REGISTERS
11 0000 Test Pattern Start 0000 0000
11 0001 Test Pattern Start 0000 0000
11 0010 Test Pattern Width 0000 0000
11 0011 Test Pattern Width 0000 0000
11 0100
Test Pattern
Control
0000 0000
11 0101
11 0110
11 0111
11 1000
11 1001
11 1010
11 1011
11 1100
Test Pattern Pitch
Test Pattern Step
Test Pattern
Channel Offset
Test Pattern Value
Test Pattern Value
Reserved
Reserved
Digital
Configuration
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
11 1101
Test & Scan
Control
0000 0000
11 1110
11 1111
Device ID
Reserved
0100 1000
0000 0000
Bit 7
Bit 6
REGISTER and BIT DESCRIPTION
Bit 5
Bit 4
Bit 3
Bit 2
Not Used
Not Used
Reserved
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Bit 1
Bit 0
DLL Reset
Pattern
Enable
Not Used
Pattern Mode
Start Upper Bits
Start Lower Bits
Width Upper Bits
Width Lower Bits
Pseudo
Random
Enable
Test Pattern Pitch
Test Pattern Step Code
Seed
Enable
Pattern Output Channel
Not Used
Test Pattern Channel Offset
Pattern Upper Bits
Pattern Lower Bits
Not Used
Not Used
Not Used
Auto Read
Pattern
Voting
Enable
U-Wire
Voting
Enable
Not Used Test Reset Test Mode
Device Revision ID. Engineering samples might be x01 or x47.
Not Used
Not Used
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