LM98640QML-SP Datasheet, PDF (17/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output

www.ti.com
LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
6.8 Operating Life Test Delta Parameters T_A at 25°C⁽¹⁾⁽²⁾
PARAMETER
TEST CONDITIONS
VDD33 Analog Supply Current Dual
Channel Power optimized for
PGA Gain = 1-4x
Powerdown Control Reg = 0x00
(see Power Trimming section for PGA and
ADC Power Trimming register settings)
5 MHz
15 MHz
25 MHz
40 MHz
VDD33 Analog Supply Current Dual
Channel Power optimized for
PGA Gain = 1-8x
Powerdown Control Reg = 0x00
(see Power Trimming section for PGA and
ADC Power Trimming register settings)
5 MHz
15 MHz
25 MHz
40 MHz
Powerdown Control Reg = 0x15 (CH1 PD)
IA
or = 0x2A (CH2 PD)
(see Power Trimming section for PGA and
VDD33 Analog Supply Current Single
ADC Power Trimming register settings)
Channel Power optimized for
5 MHz
PGA Gain = 1-4x
15 MHz
25 MHz
40 MHz
VDD33 Analog Supply Current Single
Channel Power optimized for
PGA Gain = 1-8x
Powerdown Control Reg = 0x15 (CH1 PD)
or = 0x2A (CH2 PD)
(see Power Trimming section for PGA and
ADC Power Trimming register settings)
5 MHz
15 MHz
25 MHz
40 MHz
VDD33 Analog Supply Current
Powerdown
Powerdown Control Reg = 0x80
5 MHz
VDD18 Digital Supply Current
ID
15 MHz
25 MHz
40 MHz
VDD18 Digital Supply Current
Powerdown
Powerdown Control Reg = 0x80
MIN MAX
UNIT
±2
mA
±2
mA
±2
mA
±2
mA
±1
mA
±1
mA
±1
mA
(1) The analog inputs are protected as shown below. Input voltage magnitudes beyond the supply rails will not damage the device, provided
the current is limited per Note 2 under the LM98640QML Electrical Characteristics. However, input errors will be generated If the input
goes above VDD33 and below VSS.
V_A
I/O
To Internal Circuitry
AGND
(2) These parameters are worse case drift. Deltas are performed at room temperature Post OP Life. All other parameters no Deltas are
required.
Copyright © 2010–2015, Texas Instruments Incorporated
Product Folder Links: LM98640QML-SP
Submit Documentation Feedback
17