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LM98640QML-SP Datasheet, PDF (5/54 Pages) Texas Instruments – Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output
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Pin
Name
46 TXOUT0-
47 TXCLK+
48 TXCLK-
49 VSS18
50 VDD18
51 ATB0
52 ATB1
53 VDD18
54 VDD18
55 VSS18
56 VSS18
57 INCLK-
58 INCLK+
59 VSS33
60 VDD33
61 VDD33
62 VSS33
63 IBIAS0
64 IBIAS1
65 VREFBG
66 VSS33
67 VREFT1
68 VREFB1
Exp Pad
LM98640QML-SP
SNAS461D – MAY 2010 – REVISED SEPTEMBER 2015
I/O(1) Typ
O
D
O
D
O
D
P
P
O
A
O
A
P
P
P
P
I
D
I
D
P
P
P
P
I
A
I
A
O
A
P
O
A
O
A
P
Pin Functions (continued)
Res
Description
LVDS Data Out0-
LVDS Clock+
LVDS Clock-
Digital supply return.
Digital power supply. Decouple with minimum 0.1µF capacitor to VSS18 plane.
Analog Test Bus. If not used, can be connected to VSS18 through a 10kΩ resistor.
Analog Test Bus. If not used, can be connected to VSS18 through a 10kΩ resistor.
Digital power supply. Decouple with minimum 0.1µF capacitor to VSS18 plane.
Digital power supply. Decouple with minimum 0.1µF capacitor to VSS18 plane.
Digital supply return.
Digital supply return.
Clock Input. Inverting input for LVDS clocks.
Clock Input. Non-Inverting input for LVDS clocks.
Analog supply return.
Analog power supply. Decouple with minimum 0.1µF capacitor to VSS33 plane.
Analog power supply. Decouple with minimum 0.1µF capacitor to VSS33 plane.
Analog supply return.
Connect with external 10kΩ 1% resistor to IBIAS1 pin.
Connect with external 10kΩ 1% resistor to IBIAS0 pin.
Band gap reference output. Bypass with a 0.1µF capacitor to VSS33. Can be overdriven
with external voltage source.
Analog supply return.
Top of ADC reference. Bypass with a 0.1µF capacitor to VSS33.
Bottom of ADC reference. Bypass with a 0.1µF capacitor to VSS33.
Exposed pad must be soldered to ground plane to ensure rated performance.
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