DS92LV2421_16 Datasheet, PDF (6/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
www.ti.com
Pin Functions: DS92LV2421 (Serializer) (continued)
PIN
NAME
NO.
POWER AND GROUND⁽³⁾
VDDL
7
VDDP
14
VDDHS
17
VDDTX
22
VDDIO
30
GND
DAP
TYPE ⁽¹⁾
DESCRIPTION ⁽²⁾
P
Logic power, 1.8 V ± 5%
P
PLL power, 1.8 V ± 5%
P
TX high-speed logic power, 1.8 V ± 5%
P
Output driver power, 1.8 V ± 5%
P
LVCMOS I/O power, 1.8 V ± 5% or 3.3 V ± 10%
G
DAP is the large metal contact at the bottom side, located at the center of the WQFN
package. Connect to the ground plane (GND) with at least 9 vias.
(3) The V_DD (V_DDn and V_DDIO) supply ramp must be faster than 1.5 ms with a monotonic rise. If slower then 1.5 ms, then a capacitor on the
PDB pin is needed to ensure PDB arrives after all the VDD have settled to the recommended operating voltage.
NKB Package
60-Pin WQFN
Top View
NC
46
RES
47
VDDIR
48
RIN+
49
RIN-
50
CMF
51
ROUT+
52
ROUT-
53
VDDCMLO
54
VDDR
55
ID[x]
56
VDDPR
57
VDDSC
58
PDB
59
NC
60
DAP
30
NC
29
VDDL
28
DO8/OSC_SEL0
27
DO9/OSC_SEL1
26
DO10/OSC_SEL2
25
DO11
24
VDDIO
23
DO12/EQ0
22
DO13/EQ1
21
DO14/EQ2
20
DO15/EQ3
19
DO16
18
DO17/RFB
17
DO18/OSS_SEL
16
NC
Not to scale
6
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