DS92LV2421_16 Datasheet, PDF (39/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

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DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
ADD
(DEC)
0
1
2
ADD
(HEX)
0
1
2
Table 16. DESERIALIZER — Serial Bus Control Registers
REGISTER
NAME
BIT(S)
R/W
7
R/W
6
R/W
5
R/W
4
R/W
Deserializer
Config 1
3:2 R/W
1
R/W
0
R/W
7
R/W
Slave ID
6:0 R/W
7
R/W
6
R/W
Deserializer ^5:4
R/W
Features 1
3
R/W
2:0 R/W
DEFAULT
(BIN)
0
0
0
0
00
0
0
0
1110000
0
0
00
0
00
FUNCTION
DESCRIPTION
LF_MODE
0: 20 to 65 MHz SSCG Operation
1: 10 to 20 MHz SSCG Operation
OS_CLKOUT
0: Normal CLKOUT Slew Rate
1: Increased CLKOUT Slew Rate
OS_DATA
0: Normal DATA Slew Rate
1: Increased DATA Slew Rate
RFB
0: Data strobed on Falling edge of CLKOUT
1: Data strobed on Rising edge of CLKOUT
CONFIG
00: Normal Mode, Control Signal Filter Disabled
01: Normal Mode, Control Signal Filter Enabled
10: DS90UR241, DS99R241-Q1 Reverse-
Compatibility Mode (FPD-Link II, GEN2)
11: DS90C241 Reverse-Compatibility Mode (FPD-
Link II, GEN1)
SLEEP
Note – not the same function as PowerDown (PDB)
0: Normal Mode
1: Sleep Mode – Register settings retained.
REG Control
0: Configurations set from control pins or strap pins
1: Configurations set from registers (except I²C_ID)
REG ID
0: Address from ID[X] Pin
1: Address from Register
ID[X]
Serial Bus Device ID, Four IDs are:
7b '1110 001 (h'71)
7b '1110 010 (h'72)
7b '1110 011 (h'73)
7b '1110 110 (h'76)
All other addresses are Reserved.
OP_LOW
0: Set outputs state LOW (except LOCK)
1: Release output LOW state, outputs toggling
normally
Note: This register only works during LOCK = 1
OSS_SEL
Output Sleep State Select
0: CLKOUT, DO[23:0], CO1, CO2, CO3 = L, LOCK =
Normal, PASS = H
1: CLKOUT, DO[23:0], CO1, CO2, CO3 = Tri-State,
LOCK = Normal, PASS = H
MAP_SEL
Special for Reverse-Compatibility Mode
00: Bit 4, 5 on LSB
01: LSB zero if all data is zero; one if any data is one
10: LSB zero
11: LSB zero
OP_LOW
Strap Bypass
0: Strap will determine whether OP_LOW feature is
ON or OFF
1: Turns OFF OP_LOW feature
OSC_SEL
000: Disable
001: 50 MHz ± 40%
010: 25 MHz ± 40%
011: 16.7 MHz ± 40%
100: 12.5 MHz ± 40%
101: 10 MHz ± 40%
110: 8.3 MHz ± 40%
111: 6.3 MHz ± 40%
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