DS92LV2421_16 Datasheet, PDF (41/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

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8 Application and Implementation
DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Display Application
The DS92LV242x chipset is intended for interface between a host (graphics processor) and a display. It supports
a 24-bit color depth (RGB888) and up to 1024 x 768 display formats. In a RGB888 application, 24 color bits
(D[23:0]), Pixel Clock (CLKIN), and three control bits (C1, C2, C3) are supported across the serial link with
CLKIN rates from 10 to 75 MHz. The chipset may also be used in 18-bit color applications. In this application,
three to six general-purpose signals may also be sent from host to display.
The deserializer is expected to be placed close to its target device. The interconnect between the deserializer
and the target device is typically in the 1 to 3 inch separation range. The input capacitance of the target device is
expected to be in the 5 pF to 10 pF range. Take care of the CLKOUT output trace, as this signal is edge
sensitive and strobes the data. It is also assumed that the fanout of the deserializer is one. If additional loads
need to be driven, a logic buffer or mux device is recommended.
8.1.2 Live Link Insertion
The serializer and deserializer devices support live pluggable applications. The automatic receiver lock to
random data plug and go hot insertion capability allows the DS92LV2422 to attain lock to the active data stream
during a live insertion event.
8.1.3 Alternate Color / Data Mapping
Color Mapped Data Pin names are provided to specify a recommended mapping for 24-bit color applications.
Seven [7] is assumed to be the MSB, and Zero [0] is assumed to be the LSB. While this is recommended, it is
not required. When connecting to earlier generations of FPD-Link II serializer and deserializer devices, a color
mapping review is recommended to ensure the correct connectivity is obtained. Table 17 provides examples for
interfacing to 18-bit applications with or without the video control signals embedded. The DS92LV2422
deserializer provides additional flexibility with the MAP_SEL feature as well.
18-BIT RGB
LSB R0
R1
R2
R3
R4
MSB R5
LSB G0
G1
G2
G3
G4
MSB G5
LSB B0
B1
18-BIT RGB
GP0
GP1
R0
R1
R2
R3
R4
R5
GP2
GP3
G0
G1
G2
G3
Table 17. Alternate Color and Data Mapping
24-BIT RGB
R0
R1
R2
R3
R4
R5
R6
R7
G0
G1
G2
G3
G4
G5
2421 PIN
NAME
DI0
DI1
DI2
DI3
DI4
DI5
DI6
DI7
DI8
DI9
DI10
DI11
DI12
DI13
2422 PIN
NAME
DO0
DO1
DO2
DO3
DO4
DO5
DO6
DO7
DO8
DO9
DO10
DO11
DO12
DO13
24-BIT RGB
R0
R1
R2
R3
R4
R5
R6
R7
G0
G1
G2
G3
G4
G5
18-BIT RGB
GP0
GP1
R0
R1
R2
R3
R4
R5
GP2
GP3
G0
G1
G2
G3
18-BIT RGB
LSB R0
R1
R2
R3
R4
MSB R5
LSB G0
G1
G2
G3
G4
MSB G5
LSB0
B1
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