DS92LV2421_16 Datasheet, PDF (12/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
Electrical Characteristics – Serializer DC (continued)
Over recommended operating supply and temperature ranges (unless otherwise noted).^(1)(2)(3)
PARAMETER
TEST CONDITIONS
MIN TYP
SUPPLY CURRENT
I_DDT1
Serializer supply current
(includes load current)
R_L = 100 Ω, CLKIN = 75 MHz,
checker board pattern,
de-emphasis = 3 kΩ, VODSEL = H
V_DD = 1.89 V
V_DDIO = 1.89 V
75
3
I_DDIOT1
(see Figure 9)
V_DDIO = 3.6 V
11
I_DDT2
Serializer supply current
(includes load current)
R_L = 100 Ω, CLKIN = 75 MHz,
checker board pattern,
de-emphasis = 6 kΩ, VODSEL = L
V_DD = 1.89 V
V_DDIO = 1.89 V
65
3
I_DDIOT2
(see Figure 9)
V_DDIO = 3.6 V
11
I_DDZ
Serializer supply current
power-down
PDB = 0 V, All other LVCMOS Inputs
=0V
V_DD = 1.89 V
V_DDIO = 1.89 V
40
5
I_DDIOZ
V_DDIO = 3.6 V
10
6.6 Electrical Characteristics – Deserializer DC
Over recommended operating supply and temperature ranges (unless otherwise noted).
PARAMETER
TEST CONDITIONS
3.3-V I/O LVCMOS DC SPECIFICATIONS (V_DDIO = 3 V TO 3.6 V)
V_IH
High level input voltage
PDB and BISTEN pins
V_IL
Low level input voltage
PDB and BISTEN pins
I_IN
Input current
V_IN = 0 V or V_DDIO (PDB and BISTEN pins)
V_OH
High level output voltage
I_OH = −2 mA, OS_CLKOUT/DATA = L (DO[23:0], CO1,
CO2, CO3, CLKOUT, LOCK, and PASS pins)
V_OL
Low level output voltage
I_OL = 3 mA, OS_CLKOUT/DATA = L (DO[23:0], CO1,
CO2, CO3, CLKOUT, LOCK, and PASS pins)
Output short circuit current
I_OS
Output short circuit current
V_DDIO = 3.3 V, V_OUT = 0 V, OS_CLKOUT/DATA = L/H
(CLKOUT pin)
V_DDIO = 3.3 V, V_OUT = 0 V, OS_CLKOUT/DATA = L/H
(output pins)
I_OZ
TRI-STATE output current
PDB = 0 V, OSS_SEL = 0 V, V_OUT = H (output pins)
1.8-V I/O LVCMOS DC SPECIFICATIONS (V_DDIO = 1.71 V to 1.89 V)
V_IH
High level input voltage
PDB and BISTEN pins
V_IL
Low level input voltage
PDB and BISTEN pins
I_IN
Input current
V_IN = 0 V or V_DDIO (PDB and BISTEN pins)
V_OH
High level output voltage
I_OH = –2 mA, OS_CLKOUT/DATA = L/H (DO[23:0],
CO1, CO2, CO3, CLKOUT, LOCK, and PASS pins)
V_OL
Low level output voltage
I_OL = 2 mA, OS_CLKOUT/DATA = L/H (DO[23:0],
CO1, CO2, CO3, CLKOUT, LOCK, and PASS pins)
Output short circuit current
I_OS
Output short circuit current
V_DDIO = 1.8 V, V_OUT = 0 V, OS_CLKOUT/DATA = L/H
(CLKOUT pin)
V_DDIO = 1.8 V, V_OUT = 0 V, OS_CLKOUT/DATA = L/H
(output pins)
I_OZ
TRI-STATE output current
PDB = 0 V, OSS_SEL = 0 V, V_OUT = 0 V or V_DDIO
(output pins)
CML RECEIVER DC SPECIFICATIONS
V_TH
Differential input threshold high
voltage
V_CM = 1.2 V, RIN+ and RIN- pins (Internal V_BIAS)
V_TL
Differential input threshold low voltage V_CM = 1.2 V, RIN+ and RIN- pins (Internal V_BIAS)
V_CM
Common mode voltage
RIN+ and RIN- pins (Internal V_BIAS)
I_IN
Input current
V_IN = 0 V or V_DDIO, RIN+ and RIN- pins
R_TI
Internal input termination resistor
RIN+ and RIN- pins
LOOP THROUGH CML DRIVER OUTPUT DC SPECIFICATIONS (EQ TEST PORT⁽¹⁾)
V_OD
Differential output voltage
V_OS
Offset voltage
(single-ended)
ROUT+ and ROUT- pins, R_L = 100 Ω
ROUT+ and ROUT- pins, R_L = 100 Ω
MIN
2.2
GND
−15
2.4
−15
1.235
GND
−15
V_DDIO – 0.45
GND
–15
50
–50
–15
80
TYP
±1
V_DDIO
GND
36
37
±1
V_DDIO
18
18
1.2
100
542
1.4
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MAX UNIT
90
5 mA
15
80
5 mA
15
1000
10
µA
20
MAX UNIT
V_DDIO
V
0.8
V
15
μA
V
0.4
V
mA
15
µA
V_DDIO
V
0.595
V
15
μA
V
0.45
V
mA
15
µA
mV
mV
V
15
µA
120
Ω
mV
V
(1) Specification is verified by characterization and is not tested in production.
12
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