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DS92LV2421_16 Datasheet, PDF (10/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer
DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
Supply voltage, VDDn (1.8 V)
Supply voltage, VDDIO
LVCMOS I/O voltage
Receiver input voltage
Driver output voltage
48L RHS package
Maximum power dissipation capacity at 25°C
Derate above 25°C
60L NKB package
Maximum power dissipation capacity at 25°C
Derate above 25°C
Junction temperature, TJ
Storage temperature, Tstg
MIN
MAX
UNIT
–0.3
2.5
V
–0.3
4
V
–0.3
VDDIO + 0.3
V
–0.3
VDD + 0.3
V
–0.3
VDD + 0.3
V
225
mW
1 / RθJA
525
mW/°C
mW
1 / RθJA
150
mW/°C
°C
–65
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) For soldering specifications, see product folder at www.ti.com and SNOA549.
6.2 ESD Ratings
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
VALUE
±8000
±1000
Machine model (MM)
±250
V(ESD) Electrostatic discharge
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air-gap discharge
DOUT+, DOUT-
RIN+, RIN-
DOUT+, DOUT-
RIN+, RIN-
≥±8000
≥±8000
≥±25000
≥±25000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
MIN
NOM
MAX UNIT
VDDn
VDDIO
VDDIO
TA
Supply voltage
LVCMOS supply voltage
LVCMOS supply voltage
Clock frequency
Supply noise(1)
Operating free-air temperature
1.71
1.8
1.89 V
1.71
1.8
1.89 V
3
3.3
3.6 V
10
75 MHz
50 mVp-p
–40
25
85 °C
(1) Supply noise testing was done with minimum capacitors on the PCB. A sinusoidal signal is AC-coupled to the VDDn (1.8 V) supply with
amplitude = 100 mVp-p measured at the device VDDn pins. Bit error rate testing of input to the serializer and output of the deserializer
with 10 meter cable shows no error when the noise frequency on the serializer is less than 750 kHz. The deserializer, on the other hand,
shows no error when the noise frequency is less than 400 kHz.
10
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