DS92LV2421_16 Datasheet, PDF (35/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

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DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
7.3.5.2 BER Calculations
It is possible to calculate the approximate Bit Error Rate (BER). The following is required:
• Clock Frequency (MHz)
• BIST Duration (seconds)
• BIST Test Result (PASS)
The BER is less than or equal to one over the product of 24 times the CLKOUT rate times the test duration. If we
assume a 65-MHz clock, a 10-minute (600 seconds) test, and a PASS, the BER is ≤ 1.07 X 10E-12.
BIST mode runs a check on the data payload bits. The LOCK pin also provides a link status. If the recovery of
the C0 and C1 bits does not reconstruct the expected clock signal, the LOCK pin switches low. The combination
of the LOCK and At-Speed BIST PASS pin provides a powerful tool for system evaluation and performance
monitoring.
7.3.6 Optional Serial Bus Control
The serializer and deserializer may also be configured by the use of a serial control bus that is I²C protocol-
compatible. By default, the I²C Reg 0x00 = 0x00, and all configuration is set by control or strap pins. Writing reg
0x00 = 0x01 enables or allows configuration by registers; this overrides the control or strap pins. Multiple devices
may share the serial control bus, because multiple addresses are supported (see Figure 34).
The serial bus is comprised of three pins. The SCL is a serial bus clock input. The SDA is the serial bus data
input or output signal. Both SCL and SDA signals require an external pullup resistor to V_DDIO. For most
applications, a 4.7-kΩ pullup resistor to V_DDIO may be used. The resistor value may be adjusted for capacitive
loading and data rate requirements. The signals are either pulled high or driven low.
1.8V
HOST
SCL
SDA
V_DDIO
4.7k
4.7k
10 k
ID[X]
R_ID
SER
or
SCL _DES
SDA
To other
Devices
Figure 34. Serial Control Bus Connection
The third pin is the ID[X] pin. This pin sets one of four possible device addresses. Two different connections are
possible:
• The pin may be pulled to V_DD (1.8 V, not V_DDIO) with a 10-kΩ resistor.
• The pin may be pulled to V_DD (1.8 V, not V_DDIO) with a 10-kΩ resistor and pulled down to ground with a
recommended value RID resistor. This creates a voltage divider that sets the other three possible addresses.
See Table 11 for the serializer and Table 12 for the deserializer. Do not tie ID[X] directly to VSS.
Table 11. ID[X] Resistor Value – DS92LV2421 (Serializer)
RESISTOR
RID kΩ⁽¹⁾
(5% TOL)
0.47
2.7
8.2
Open
ADDRESS
7'b
7b' 110 1001 (h'69)
7b' 110 1010 (h'6A)
7b' 110 1011 (h'6B)
7b' 110 1110 (h'6E)
ADDRESS
8'b
0 APPENDED (WRITE)
8b' 1101 0010 (h'D2)
8b' 1101 0100 (h'D4)
8b' 1101 0110 (h'D6)
8b' 1101 1100 (h'DC)
(1) RID ≠ 0 Ω. Do not connect directly to VSS (GND). This is not a valid address.
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