DS92LV2421_16 Datasheet, PDF (13/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

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DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
Electrical Characteristics – Deserializer DC (continued)
Over recommended operating supply and temperature ranges (unless otherwise noted).
PARAMETER
TEST CONDITIONS
R_T
Internal termination resistor
SUPPLY CURRENT
ROUT+ and ROUT- pins
I_DD1
I_DDIO1
I_DDZ
I_DDIOZ
Deserializer supply current (includes
load current)
Deserializer supply current power
down
CLKOUT = 75 MHz, checker
board pattern,
OS_CLKOUT/DATA = H,
C_L = 4 pF (see Figure 9)
PDB = 0 V, All other LVCMOS
Inputs = 0 V
V_DD = 1.89 V
V_DDIO = 1.89 V
V_DDIO = 3.6 V
V_DD = 1.89 V
V_DDIO = 1.89 V
V_DDIO = 3.6 V
MIN
TYP
MAX UNIT
80
100
120
Ω
97
115
40
50 mA
75
85
100
3000
6
50
µA
12
100
6.7 Electrical Characteristics – DC and AC Serial Control Bus
Over 3.3-V supply and temperature ranges (unless otherwise noted).
PARAMETER
TEST CONDITIONS
V_IH
Input high level
V_IL
Input low level voltage
V_HY
Input hysteresis
V_OL
Output low level voltage⁽¹⁾
I_in
Input current
C_in
Input capacitance
SDA and SCL
SDA and SCL
SDA, I_OL = 1.25 mA, V_DDIO = 3.3 V
SDA or SCL, Vin = V_DDIO or GND
SDA or SCL
(1) Specification is verified by characterization and is not tested in production.
6.8 Timing Requirements – DC and AC Serial Control Bus
Over 3.3-V supply and temperature ranges (unless otherwise noted).
PARAMETER
TEST CONDITIONS
t_R
t_F
t_SU;DAT
t_HD;DAT
t_SP
SDA rise time (read)
SDA fall time (read)
Set up time (read)
Hold up time (read)
Input filter
SDA, RPU = 10 kΩ, Cb ≤ 400 pF
SDA, RPU = 10 kΩ, Cb ≤ 400 pF
MIN
2.2
GND
0
–15
TYP
>50
<5
MAX
V_DDIO
0.8
0.4
15
UNIT
V
V
mV
V
µA
pF
MIN TYP MAX UNIT
40
ns
25
ns
520
ns
55
ns
50
ns
6.9 Timing Requirements – Serializer for CLKIN
Over recommended operating supply and temperature ranges (unless otherwise noted).
PARAMETER
TEST CONDITIONS
t_TCP
t_TCIH
t_TCIL
t_CLKT
SSC_IN
Transmit input CLKIN period
Transmit input CLKIN high time
Transmit input CLKIN low time
CLKIN input transition time
CLKIN input
10 MHz to 75 MHz (see Figure 4)
10 MHz to 75 MHz (see Figure 4)
10 MHz to 75 MHz (see Figure 4)
10 MHz to 75 MHz (see Figure 4)
fmod (spread spectrum at 75 MHz)
fdev (spread spectrum at 75 MHz)
MIN
13.3
0.4 × T
0.4 × T
0.5
NOM
T
0.5 × T
0.5 × T
MAX
100
0.6 × T
0.6 × T
2.4
35
±2%
UNIT
ns
ns
ns
ns
kHz
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