DS92LV2421_16 Datasheet, PDF (20/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
www.ti.com
CLKOUT
w/ RFB = H
DO[23:0],
CO1,CO2,CO3
1/2 V_DDIO
1/2 V_DDIO
1/2 V_DDIO
t_ROS
t_ROH
V_DDIO
GND
V_DDIO
GND
Figure 14. Deserializer Output Data Valid (Setup and Hold) Times With SSCG = Off
CLKOUT
w/ RFB = H
DO[23:0],
CO1,CO2,CO3
1/2 V_DDIO
1/2 V_DDIO 1/2 V_DDIO
t_ROS
t_ROH
V_DDIO
GND
V_DDIO
GND
Figure 15. Deserializer Output Data Valid (Setup And Hold) Times With SSCG = On
Ideal Data Bit
Beginning
Sampling
Window
Ideal Data
Bit End
RxIN_TOL
Left
RxIN_TOL
Right
V_TH
0V
V_TL
Ideal Center Position (t_BIT/2)
t_BIT (1 UI)
t_RJIT = RxIN_TOL (Left + Right)
Sampling Window = 1 UI - t_RJIT
Figure 16. Receiver Input Jitter Tolerance
BISTEN
PASS
(w/ errors)
Prior BIST Result
Current BIST Test - Toggle on Error
1/2 V_DDIO
t_PASS
1/2 V_DDIO
Result Held
Figure 17. BIST Pass Waveform
20
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