DS92LV2421_16 Datasheet, PDF (45/59 Pages) Texas Instruments – 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer

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DS92LV2421, DS92LV2422
SNLS321C – MAY 2010 – REVISED MAY 2016
1.8V
C13 C11
C3
C4
C5
C15 C6
DS92LV2422 (DES)
VDDL
VDDIO
C8
VDDSC
VDDIO
C9
VDDPR
VDDIO
C10
VDDR
VDDIR
C16 C7
VDDCMLO
Serial
Channel Link II
Interface
C1
C2
C17
RIN+
RIN-
CMF
Host
Control
TP_A
TP_B
C18
ROUT+
ROUT-
BISTEN
PDB
1.8V
10k
RID
NOTE:
C1 - C2 = 0.1 PF (50 WV)
C3 - C12 = 0.1 PF
C13, C16 = 4.7 PF
C17, C18 = >10 PF
RID (Use Recommended ID[x] Resistor Value)
FB1-FB4: Impedance = 1 k:,
low DC resistance (<1:)
ID[X]
SCL
SDA
NC
8
RES
DAP (GND)
VDDIO
DO0
DO1
DO2
DO3
DO4
DO5
DO6
DO7
DO8
DO9
DO10
DO11
DO12
DO13
DO14
DO15
DO16
DO17
DO18
DO19
DO20
DO21
DO22
DO23
CO1
CO2
CO3
CLKOUT
LOCK
PASS
EXAMPLE:
STRAP
Input
Pull-Ups
(10k)
VDDIO
C12 C14
LVCMOS
Parallel
Video
Interface
Copyright © 2016, Texas Instruments Incorporated
Figure 40. DS92LV2422 Typical Connection Diagram — Pin Control
8.2.2.1 Design Requirements
For this example, Table 19 lists the design parameters.
Copyright © 2010–2016, Texas Instruments Incorporated
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