DS92LV2411_15 Datasheet, PDF (5/54 Pages) Texas Instruments – 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

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DS92LV2411, DS92LV2412
SNLS302E – MAY 2010 – REVISED FEBRUARY 2015
Pin Functions, DS92LV2411 Serializer⁽¹⁾ (continued)
PIN
NAME
NO.
TYPE
DESCRIPTION
CHANNEL-LINK II — CML SERIAL INTERFACE
DOUT-
19
O, CML Inverting Output.
The output must be AC Coupled with a 0.1 µF capacitor.
DOUT+
20
O, CML Non–Inverting Output.
The output must be AC Coupled with a 0.1 µF capacitor.
POWER AND GROUND
GND
DAP
Ground
DAP is the large metal contact at the bottom side, located at the center of the WQFN
package. Connect to the ground plane (GND) with at least 9 vias.
VDDHS
17
Power TX High Speed Logic Power, 1.8 V ±5%
VDDIO
30
Power LVCMOS I/O Power, 1.8 V ±5% OR 3.3 V ±10%
VDDL
7
Power Logic Power, 1.8 V ±5%
VDDP
14
Power PLL Power, 1.8 V ±5%
VDDTX
22
Power Output Driver Power, 1.8 V ±5%
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