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DS92LV2411_15 Datasheet, PDF (2/54 Pages) Texas Instruments – 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer
DS92LV2411, DS92LV2412
SNLS302E – MAY 2010 – REVISED FEBRUARY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Typical Application Schematic............................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications....................................................... 10
7.1 Absolute Maximum Ratings .................................... 10
7.2 ESD Ratings............................................................ 10
7.3 Recommended Operating Conditions..................... 10
7.4 Thermal Information ................................................ 11
7.5 Serializer DC Electrical Characteristics .................. 11
7.6 Deserializer DC Electrical Characteristics .............. 12
7.7 DC and AC Serial Control Bus Characteristics....... 13
7.8 Recommended Timing For The Serial Control Bus 14
7.9 Recommended Serializer Timing For CLKIN.......... 18
7.10 Serializer Switching Characteristics...................... 19
7.11 Deserializer Switching Characteristics.................. 20
7.12 Typical Characteristics .......................................... 21
8 Detailed Description ............................................ 22
8.1 Overview ................................................................. 22
8.2 Functional Block Diagrams ..................................... 22
8.3 Feature Description................................................. 23
8.4 Device Functional Modes........................................ 34
8.5 Programming........................................................... 34
8.6 Register Maps ......................................................... 37
9 Applications and Implementation ...................... 40
9.1 Application Information............................................ 40
9.2 Typical Applications ................................................ 40
10 Power Supply Recommendations ..................... 44
11 Layout................................................................... 44
11.1 Layout Guidelines ................................................. 44
11.2 Layout Example .................................................... 44
12 Device and Documentation Support ................. 47
12.1 Related Links ........................................................ 47
12.2 Trademarks ........................................................... 47
12.3 Electrostatic Discharge Caution ............................ 47
12.4 Glossary ................................................................ 47
13 Mechanical, Packaging, and Orderable
Information ........................................................... 47
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (April 2014) to Revision E
Page
• Changed "Terminal" terminology back to "Pin" ..................................................................................................................... 1
• Added statement about checkerboard pattern from deserializer data output when in BIST mode ..................................... 32
• Added note that BISTEN pin must be high and REG = 0 to use BIST mode. .................................................................... 32
• Changed deserializer Reg 0x02[6] definition to match correct OSS_SEL behavior ............................................................ 38
Changes from Revision C (April 2013) to Revision D
Page
• Added Handling Ratings and Thermal Characteristics and updated datasheet to new layout. ............................................ 1
• Changed Serializer Supply current power down test condition from VDDIO from 13.6V to 3.6V .......................................... 12
• Added DC to "Deserializer Electrical Characteristics" .......................................................................................................... 12
• Changed typical value to 36mA instead of 37mA ............................................................................................................... 12
• Changed Test condition of VOUT for determining IOZ ........................................................................................................... 12
• Added max value for VIL when using 1.8V I/O LVCMOS .................................................................................................... 12
• Changed IOL from 3mA to 1.25mA ..................................................................................................................................... 13
• Changed parentheses location of UI equation for clarification ............................................................................................ 20
• Added characteristic graphics for serializer CML driver output and deserializer LVCMOS clock output ............................ 21
• Added applications graphics of the serializer output with and without de-emphasis .......................................................... 43
• Added layout example and stencil diagram graphics ........................................................................................................... 44
Changes from Revision B (April 2013) to Revision C
Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 43
2
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