DS92LV2411_15 Datasheet, PDF (17/54 Pages) Texas Instruments – 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

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DS92LV2411, DS92LV2412
SNLS302E – MAY 2010 – REVISED FEBRUARY 2015
PDB
1/2 V_DDIO
RIN
(Diff.)
active
"X"
CLKOUT,
DO[23:0],
CO1,CO2,CO3
PASS, LOCK
t_XZR
active
Z (TRI-STATE)
Figure 12. Deserializer Disable Time (OSS_SEL = 0)
PDB
2.0V
RIN
(Diff.)
0.8V
'RQ¶W&DUH
LOCK ^TRI-STATE
or LOW
t_DDLT
DO[23:0],
CO1,CO2,CO3
TRI-STATE or LOW or Pulled Up
Z or L
t_RxZ
Z or L or PU
CLKOUT
(RFB = L)
OFF
TRI-STATE or LOW
IN LOCK TIME
ACTIVE
Z or L
OFF
Figure 13. Deserializer PLL Lock Times And PDB Tri-State Delay
CLKOUT
w/RFB = H
DO[23:0],
CO1,CO2,CO3
1/2 V_DDIO
1/2 V_DDIO
1/2 V_DDIO
t_ROS
t_ROH
V_DDIO
GND
V_DDIO
GND
Figure 14. Deserializer Output Data Valid (Setup And Hold) Times With SSCG = Off
CLKOUT
w/RFB = H
DO[23:0],
CO1,CO2,CO3
1/2 V_DDIO
1/2 V_DDIO 1/2 V_DDIO
t_ROS
t_ROH
V_DDIO
GND
V_DDIO
GND
Figure 15. Deserializer Output Data Valid (Setup And Hold) Times With SSCG = On
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