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| DS92LV2411_15 Datasheet, PDF (18/54 Pages) Texas Instruments – 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer | |||
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DS92LV2411, DS92LV2412
SNLS302E â MAY 2010 â REVISED FEBRUARY 2015
Ideal Data Bit
Beginning
Sampling
Window
Ideal Data
Bit End
RxIN_TOL
Left
VTH
0V
RxIN_TOL
Right
VTL
Ideal Center Position (tBIT/2)
tBIT (1 UI)
tRJIT = RxIN_TOL (Left + Right)
Sampling Window = 1 UI - tRJIT
Figure 16. Receiver Input Jitter Tolerance
BISTEN
PASS
(w/ errors)
Prior BIST Result
Current BIST Test - Toggle on Error
1/2 VDDIO
tPASS
1/2 VDDIO
Result Held
Figure 17. BIST Pass Waveform
www.ti.com
SDA
tf
SCL
tLOW
tr
tf
tHD;STA
tSP
tBUF
tr
START
tHD;STA
tHD;DAT
tHIGH
tSU;DAT
tSU;STA
REPEATED
START
tSU;STO
STOP START
Figure 18. Serial Control Bus Timing Diagram
7.9 Recommended Serializer Timing For CLKIN
Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
tTCP
tTCIH
tTCIL
tCLKT
SSCIN
Transmit Input CLKIN Period
Transmit Input CLKIN High Time
Transmit Input CLKIN Low Time
CLKIN Input Transition Time
CLKIN Input â Spread Spectrum
at 50 MHz
5 MHz to 50 MHz, Figure 4
fmod
fdev
20
0.4T
0.4T
0.5
T
0.5T
0.5T
200 ns
0.6T ns
0.6T ns
2.4 ns
35 kHz
±0.02
fMOD
kHz
18
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Product Folder Links: DS92LV2411 DS92LV2412
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