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DS92LV2411_15 Datasheet, PDF (26/54 Pages) Texas Instruments – 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer
DS92LV2411, DS92LV2412
SNLS302E – MAY 2010 – REVISED FEBRUARY 2015
Table 3. Receiver Equalization Configuration (continued)
EQ3
H
H
H
H
X
EQ2
L
L
H
H
X
INPUTS
EQ1
L
H
L
H
X
* Default Setting is EQ = Off
EQ0
H
H
H
H
L
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EFFECT
~7.5 dB
~9 dB
~10.5 dB
~12 dB
OFF*
8.3.2.2 EMI Reduction Features
8.3.2.2.1 Des — Output Slew Rate Select (OS_CLKOUT/OS_DATA)
The parallel data outputs and clock outputs of the deserializer feature selectable output slew rates. The slew rate
of the CLKOUT Pin is controlled by the strap Pin or register OS_CLKOUT, while the data outputs (DO[23:0] and
CO[3:1]) are controlled by the strap Pin or register OS_DATA. When OS_CLKOUT/DATA = HIGH, the maximum
slew rate is selected. When the OS_CLKOUT/DATA = LOW, the minimum slew rate is selected. Use the higher
slew rate when driving longer traces or a heavier capacitive load.
8.3.2.2.2 Des — Common Mode Filter Pin (CMF) — Optional
The Des provides access to the center tap of the internal termination. A capacitor may be placed on this Pin for
additional common-mode filtering of the differential pair. This can be useful in high noise environments for
additional noise rejection capability. A 4.7 µF capacitor may be connected to this Pin to Ground.
8.3.2.2.3 Des — SSCG Generation — Optional
The Des provides an internally generated spread spectrum clock (SSCG) to modulate its outputs. Both clock and
data outputs are modulated. This will aid to lower system EMI. Output SSCG deviations to ±2% (4% total) at up
to 100 kHz modulations is available. See Table 4. This feature may be controlled by external STRAP Pins or by
register.
SSC3
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
Table 4. SSCG Configuration (LF_MODE = L) — Des Output
SSC[3:0] INPUTS
LF_MODE = L (20 - 50 MHz)
SSC2
SSC1
L
L
L
L
L
H
L
H
H
L
H
L
H
H
H
H
L
L
L
L
L
H
L
H
H
L
H
L
H
H
H
H
SSC0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
RESULT
fdev (%)
NA
±0.5
±1.0
±1.5
±2.0
±0.5
±1.0
±1.5
±2.0
±0.5
±1.0
±1.5
±2.0
±0.5
±1.0
±1.5
fmod (kHz)
Disable
CLK/2168
CLK/1300
CLK/868
CLK/650
26
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