DS92LV2411_15 Datasheet, PDF (37/54 Pages) Texas Instruments – 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

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8.6 Register Maps
ADD ADD
(dec) (hex)
REGISTER
NAME
0
0 Ser Config 1
1
1 Device ID
2
2 De-Emphasis
Control
DS92LV2411, DS92LV2412
SNLS302E – MAY 2010 – REVISED FEBRUARY 2015
Table 13. Serializer — Serial Bus Control Registers
Bit(s) R/W
7
R/W
6
R/W
5
R/W
4
R/W
3:2 R/W
1
R/W
0
R/W
7
R/W
6:0 R/W
7:5 R/W
4
R/W
3:0 R/W
DEFAULT
(bin)
0
0
0
FUNCTION
Reserved
Reserved
VODSEL
0
RFB
00
CONFIG
0
SLEEP
0
REG
0
REG ID
1101000 ID[X]
000
De-E Setting
0
De-E EN
000
Reserved
DESCRIPTION
Reserved
Reserved
0: Low
1: High
0: Data latched on Falling edge of CLKIN
1: Data latched on Rising edge of CLKIN
00: Control Signal Filter Disabled
01: Control Signal Filter Enabled
10: Reserved
11: Reserved
Note – not the same function as PowerDown
(PDB)
0: normal mode
1: Sleep Mode – Register settings retained.
0: Configurations set from control Pins
1: Configuration set from registers (except I2C_ID)
0: Address from ID[X] Pin
1: Address from Register
Serial Bus Device ID, Four IDs are:
7b '1101 001 (h'69)
7b '1101 010 (h'6A)
7b '1101 011 (h'6B)
7b '1101 110 (h'6E)
All other addresses are Reserved.
000: set by external Resistor
001: -1 dB
010: -2 dB
011: -3.3 dB
100: -5 dB
101: -6.7 dB
110: -9 dB
111: -12 dB
0: De-Emphasis Enabled
1: De-Emphasis Disabled
Reserved
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