SMJ320VC5416 Datasheet, PDF (89/92 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Electrical Specifications
Table 5–36. HPI16 Mode Switching Characteristics
PARAMETER
td(DSL-HDD)
td(DSL-HDV1)
Delay time, DS low to HD driven
Delay time,
DS low to HD
valid for first
word of an
HPI read
Case 1a: Memory accesses initiated immediately following a write
when DMAC is active in 32-bit mode and tw(DSH) was < 26P
Case 1b: Memory access not immediately following a write when
DMAC is active in 32-bit mode
Case 1c: Memory accesses initiated immediately following a write
when DMAC is active in 16-bit mode and tw(DSH) was < 18P
Case 1d: Memory accesses not immediately following a write when
DMAC is active in 16-bit mode
Case 2a: Memory accesses initiated immediately following a write
when DMAC is inactive and tw(DSH) was < 10P
Case 2b: Memory accesses not immediately following a write when
DMAC is inactive
td(DSH-HYH)
Delay time,
DS high to
HRDY high
Memory writes when no DMA is active
Memory writes with one or more 16-bit DMA channels active
Memory writes with one or more 32-bit DMA channels active
tv(HYH-HDV) Valid time, HD valid after HRDY high
th(DSH-HDV)R Hold time, HD valid after DS rising edge, read
td(COH-HYH) Delay time, CLKOUT rising edge to HRDY high
td(DSL-HYL) Delay time, DS low to HRDY low
td(DSH_–HYL) Delay time, DS high to HRDY low
* Not production tested.
5416-100
MIN
MAX
0*
10*
48P +
20 – tw(DSH)*
24P + 20*
32P +
20 – tw(DSH)*
16P + 20*
20P +
20 – tw(DSH)*
10P + 20*
10P + 5*
16P + 5*
24P + 5*
7*
1*
6*
5
12*
12*
UNIT
ns
ns
ns
ns
ns
ns
ns
April 2003 – Revised July 2003
SGUS035A
79