SMJ320VC5416 Datasheet, PDF (12/92 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Introduction
2 Introduction
This section describes the main features of the SMJ320VC5416, lists the pin assignments, and describes the
function of each pin. This data manual also provides a detailed description section, electrical specifications,
parameter measurement information, and mechanical data about the available packaging.
NOTE: This data manual is designed to be used in conjunction with the TMS320C54x DSP Functional
Overview (literature number SPRU307).
2.1 Description
The SMJ320VC5416 fixed-point, digital signal processor (DSP) (hereafter referred to as the 5416 unless
otherwise specified) is based on an advanced modified Harvard architecture that has one program memory
bus and three data memory buses. This processor provides an arithmetic logic unit (ALU) with a high degree
of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The
basis of the operational flexibility and speed of this DSP is a highly specialized instruction set.
Separate program and data spaces allow simultaneous access to program instructions and data, providing
a high degree of parallelism. Two read operations and one write operation can be performed in a single cycle.
Instructions with parallel store and application-specific instructions can fully utilize this architecture. In
addition, data can be transferred between data and program spaces. Such parallelism supports a powerful
set of arithmetic, logic, and bit-manipulation operations that can all be performed in a single machine cycle.
The 5416 also includes the control mechanisms to manage interrupts, repeated operations, and function calls.
2.2 Pin Assignments
Figure 2–1 provides the pin assignments for the 164-pin ceramic quad flatpack (CQFP) package.
Table 2–2 lists terminal names, terminal functions, and operating modes for the SMJ320VC5416.
2
SGUS035A
April 2003 – Revised July 2003