SMJ320VC5416 Datasheet, PDF (44/92 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
3.13 General-Purpose I/O Pins
In addition to the standard BIO and XF pins, the 5416 has pins that can be configured for general-purpose
I/O. These pins are:
• 18 McBSP pins — BCLKX0/1/2, BCLKR0/1/2, BDR0/1/2, BFSX0/1/2, BFSR0/1/2, BDX0/1/2
• 8 HPI data pins—HD0–HD7
The general-purpose I/O function of these pins is only available when the primary pin function is not required.
3.13.1 McBSP Pins as General-Purpose I/O
When the receive or transmit portion of a McBSP is in reset, its pins can be configured as general-purpose
inputs or outputs. For more details on this feature, see Section 3.8.
3.13.2 HPI Data Pins as General-Purpose I/O
The 8-bit bidirectional data bus of the HPI can be used as general-purpose input/output (GPIO) pins when the
HPI is disabled (HPIENA = 0) or when the HPI is used in HPI16 mode (HPI16 = 1). Two memory-mapped
registers are used to control the GPIO function of the HPI data pins—the general-purpose I/O control register
(GPIOCR) and the general-purpose I/O status register (GPIOSR). The GPIOCR is shown in Figure 3–19.
15
8
Reserved
0
7
DIR7
R/W-0
6
DIR6
R/W-0
5
DIR5
R/W-0
4
DIR4
R/W-0
3
DIR3
R/W-0
2
DIR2
R/W-0
1
DIR1
R/W-0
0
DIR0
R/W-0
Figure 3–19. General-Purpose I/O Control Register (GPIOCR) [MMR Address 003Ch]
The direction bits (DIRx) are used to configure HD0–HD7 as inputs or outputs.
The status of the GPIO pins can be monitored using the bits of the GPIOSR. The GPIOSR is shown in
Figure 3–20.
15
8
Reserved
0
7
IO7
R/W-0
6
IO6
R/W-0
5
IO5
R/W-0
4
IO4
R/W-0
3
IO3
R/W-0
2
IO2
R/W-0
1
IO1
R/W-0
0
IO0
R/W-0
Figure 3–20. General-Purpose I/O Status Register (GPIOSR) [MMR Address 003Dh]
34 SGUS035A
April 2003 – Revised July 2003