SMJ320VC5416 Datasheet, PDF (86/92 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Electrical Specifications
HAS
Second Byte
tsu(HBV-DSL)
HAD^†
tsu(HBV-DSL)^‡
HBIL
First Byte
Valid
tsu(HSL-DSL)
th(DSL-HBV)
th(DSL-HBV)^‡
Second Byte
Valid
HCS
HDS
HRDY
HD READ
tw(DSH)
tw(DSL)
td(DSH-HYH)
td(DSH-HYL)
ten(DSL-HD)
td(DSL-HDV2)
th(DSH-HDV)R
Valid
td(DSL-HDV1)
Valid
Valid
HD WRITE
tsu(HDV-DSH)
th(DSH-HDV)W
Valid
tv(HYH-HDV)
Valid
Valid
td(COH-HYH)
Processor
CLK
† _{HAD refers to HCNTL0, HCNTL1, and HR/W.}
‡ _{When HAS is not used (HAS always high)}
Figure 5–28. Using HDS to Control Accesses (HCS Always Low)
76 SGUS035A
April 2003 – Revised July 2003