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SMJ320VC5416 Datasheet, PDF (67/92 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
CLKOUT
A[22:0]
D[15:0]
READY
MSTRB
MSC
Electrical Specifications
tsu(RDY)
th(RDY)
tv(RDY)MSTRB
th(RDY)MSTRB
td(MSCL)
td(MSCH)
Leading
Cycle
Wait
States
Generated
Internally
Wait
States
Generated
by READY
Trailing
Cycle
Figure 5–11. Memory Write With Externally Generated Wait States
April 2003 – Revised July 2003
SGUS035A
57