PNX1502E Datasheet, PDF (88/819 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX15xx Series
Chapter 2: Overview
12NC 9397 750 14321
Product data sheet
7.2 Video Input Processor
The Video Input Processor (VIP) handles incoming digital video and processes it for
use by other components of the PNX15xx Series. VIP provides 10-bit accurate
processing. The VIP provides the following functions:
• Receives 10-bit YUV4:2:2 digital video data from the video port. The data is
dithered down to in-memory 8-bit data format. The YUV4:2:2 data stream
typically comes from devices such as the SAA 711x, which digitize PAL or NTSC
analog video.
• Stores video data inside the video acquisition window in system memory in any
of the native pixel formats indicated in Table 5, and performs error feedback
rounding to convert the10-bit input to the selected format.
• Provides an internal Test Pattern Generator with NTSC, PAL, and variable format
support.
• Acquires VBI data using a separate acquisition window from the video acquisition
window.
• Performs horizontal scaling, cropping and pixel packing on video data from a
continuous video data stream or from a single field or frame.
• ANC header decoding or window mode for VBI data extraction.
• Horizontal up scaling up to 2x.
• Interrupt generation for VBI or video written to memory.
• SD pixel frequency up to 81 MHz input clock (SD using up to 10-bit YUV CCIR-
656).
• HD pixel frequency up to 81 MHz input clock (HD using 20-bit Y,UV input mode).
• color space conversion (mutually exclusive with scaling).
• raw data capture up to 81 MHz in either 8- or 10-bit, packed mode with double
buffering.
VIP shares its allocated pins with the FGPI module through an input router. Section 9.
shows the different operating modes of VIP and FGPI modules.
7.3 Memory Based Scaler
The PNX15xx Series contains a Memory Based Scaler that performs operations on
images in main memory. The scaler hardware can either be controlled task by task by
the TM3260, or it can be given a list of scaling tasks. The performance of the scaler
on large images is typically limited either by the 120 Mpixel/s internal processing rate
or by the allocated main memory bandwidth.
The PNX15xx Series MBS can perform:
• de-interlacing using either a median, 2-field majority select, or 3-field majority
select algorithm with an edge detect/correct post-pass (these three provide
increasing quality, at the expense of increased bandwidth requirements)
Rev. 2 — 1 December 2004
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
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