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PNX1502E Datasheet, PDF (313/819 Pages) NXP Semiconductors – Connected Media Processor
Philips Semiconductors
Volume 1 of 1
PNX15xx Series
Chapter 9: DDR Controller
Whenever a CPU DDR burst is started with dynamic ratios, the internal account is
incremented by an amount equal to “the number of clock cycles spent on the previous
CPU DDR burst” times the CPU_RATIO. This way the real overhead is measured and
accounted for and therefore the accounting mechanism is much more accurate.
CPU account
CPU_CLIP
CPU_LIMIT
#cycles_in_burst
#cycles_in_previous_burst
x CPU_RATIO
slope = CPU_DECR/cycle
transfers
constant average account below clip,
see text
time
Figure 5: CPU account using dynamic ratios
In the time zone marked “constant average account below clip” in Figure 5, the
transfer rate is such that the average value of the CPU account is constant. In this
zone, we have the following equilibrium:
CPU_RATIO × #cycles_in_previous_burst = CPU_DECR × (#cycles_between_arbitration – #cycles_in_burst)
Where #cycles_in_burst is the actual number of cycles it takes to complete this DDR
burst, and #cycles_in_previous_burst is the total number of clock cycles spent on
executing CPU bursts since the previous CPU command won the arbitration.
From this the CPU bandwidth with constant average account is derived:
CPU_BW = #----c--y---c---l--e-#-s--c-_-y--b-c--e-l-t-e-w-s---_e---ie-n--n-_--_-b--a-u-r--br--s-i--tt--r--a--t--i--o---n- = C-----P---U----_---R----A-----T---I--O------×-----#-------c-----y------c-----l-#---e---c--sC---y--_---P-c--i---n-Ul---e--_---_s---p--_-D---r--i--e-n-E---v--_--C--i--b--o--R--u--u----r--s--s--_---t---b------u------r----s-----t---+-----C----P---U-----_---D----E----C----R--
Considering that on average, the number of cycles in a burst will be equal to the
number of cycles in the previous burst, the average CPU bandwidth is:
average(CPU_BW) = --------------------C----P----U----_---D----E----C----R----------------------
CPU_RATIO + CPU_DECR
When the CPU account exceeds the CPU_CLIP value, the account can only stay
constant when the CPUs take 100% of the available bandwidth. This is unlikely to
happen because the CPU account exceeds the CPU_LIMIT value, giving DMA a
higher priority than the CPUs. Therefore, the CPU account will not stay above
CPU_CLIP for long.
With dynamic ratios enabled, the free bandwidth is also handled differently. When the
bandwidth is for free i.e., the account is above the CPU_CLIP value, the internal
account is not incremented at all. To ensure the internal account has the same value
before and after the free bandwidth DDR burst, the account never decrements
12NC 9397 750 14321
Product data sheet
Rev. 2 — 1 December 2004
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
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