PNX1502E Datasheet, PDF (198/819 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX15xx Series
Chapter 6: Boot Module
2.1 The Boot Modes
The boot modes are defined by the state of the BOOT_MODE[7:0] pins at reset time.
Therefore adequate pull-ups and pull-downs should be placed on the system board in
order to select the correct mode. Once the internal signal peri_rst_n is released, the
BOOT_MODE[7:0] pins are sampled. The sampling mechanism delays the peri_rst_n
signal by two clk_27 (the initial 27 MHz clock) periods and delays the sampling of the
BOOT_MODE[7:0] pins by five clk_27 periods. This ensures the correct values of the
BOOT_MODE pins are latched properly, since after the reset goes away, the values
on the GPIO pins may become indeterministic.
The different boot modes based on the state of the BOOT_MODE[7:0] pins is
described in the following Table 1.
Table 1: The Boot Modes
BOOT_MODE _GPIO
Bits
pins
Default Function
Description
7
11
-
EN_PCI_ARB 1 - Enables the internal PCI system arbiter
0 - Disables the internal PCI system arbiter
6:4
10:8
-
MEM_SIZE
Informs the boot scripts of the total memory size available on the
system board. This information is crucial to properly set-up the
PCI configuration management in host-assisted mode.
The pin code is as follows:
000 - 2MB
001 - 4MB
010 - 8MB
011 - 16MB
100 - 32MB
101 - 64MB
110 - 128MB
111 - 256MB
12NC 9397 750 14321
Product data sheet
Rev. 2 — 1 December 2004
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
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