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SAA7196 Datasheet, PDF (58/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro
Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Product specification
SAA7196
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDD
VI
Ves
Ptot
Tstg
Tamb
PARAMETER
CONDITIONS
supply voltage; pins 14, 27, 31, 45, 61, 77,
91 and 106
voltage on all input/output pins
electrostatic handling for all pins
note 1
total power dissipation
storage temperature range
operating ambient temperature range
MIN.
−0.5
−0.5
−
−
−65
0
Note
1. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
MAX.
+6.5
UNIT
V
VDD + 0.5 V
±2 000
V
1.5
W
+150
°C
70
°C
10 CHARACTERISTICS
VDD = 4.5 to 5.5 V; Tamb = 0 to 70 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
Supply
VDDD
VDDA
IDDD
digital supply voltage; pins 14,
31, 45, 61, 77, 91 and 106
analog supply voltage; pin 27
digital supply current
IDDA
analog supply current
Data, clock and control inputs
VIL
LOW level input voltage
VIH
HIGH level input voltage
ILI
input leakage current
CI
input capacitance data
input capacitance clocks
input capacitance 3-state I/O
inputs LOW; outputs
without load
clocks
other inputs
clocks
other inputs
VIL = 0
high-impedance state
Data and control outputs; note 1
VOL
LOW level output voltage
VOH
HIGH level output voltage
LFCO output (pin 28)
Vo(p-p)
LFCO output signal
(peak-to-peak value)
V28
output voltage
MIN.
TYP.
MAX. UNIT
4.5
5
4.5
5
−
170
−
10
−0.5
−
−0.5
−
2.4
−
2.0
−
−
−
−
−
−
−
−
−
0
−
2.4
−
1.4
2.1
1
−
5.5
V
5.5
V
260
mA
20
mA
+0.6
V
+0.8
V
VDD + 0.5 V
VDD + 0.5 V
10
µA
8
pF
10
pF
8
pF
0.6
V
VDD
V
2.6
V
VDD
V
1996 Nov 04
58