SAA7196 Datasheet, PDF (4/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro

Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Product specification
SAA7196
The circuit is I²C-bus controlled. The I²C-bus interface is
clocked by LLC to ensure proper control.
The I²C-bus control is identical to that of the SAA7194.
It is divided into two sections:
• Subaddress 00H to 1FH for the decoder part
(Tables 16 and 17)
• Subaddress 20H to 3FH for the scaler part
(Tables 29 and 30).
3 QUICK REFERENCE DATA
Measured over full voltage and temperature ranges.
SYMBOL
PARAMETER
V_DD
I_DD(tot)
V_I
V_O
f_BCK
T_amb
supply voltage
total supply current
data input level
data output level
input clock frequency
operating ambient temperature
The programming of the subaddresses for the scaler part
becomes effective at the first Vertical Sync (VS) pulse after
a transmission.
MIN. TYP. MAX.
4.5
5
5.5
−
180
280
TTL-compatible
TTL-compatible
−
−
32
0
−
70
UNIT
V
mA
MHz
°C
4 ORDERING INFORMATION
TYPE NUMBER
SAA7196H
NAME
QFP120
PACKAGE
DESCRIPTION
plastic quad flat package; 120 leads (lead length 1.95 mm);
body 28 × 28 × 3.4 mm; high stand-of height
VERSION
SOT349-1
1996 Nov 04
4