SAA7196 Datasheet, PDF (54/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro

Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Product specification
SAA7196
VC8 to VC0
‘29 and 2B’
POE
VL7 to VL0
‘2C’
VU7 to VU0
‘2D’
UL7 to UL0
‘2E’
UU7 to UU0
‘2F’
VOF
‘30’
AFG
LLV
MCT
QPL
vertical bypass count, sets length of bypass region (straight binary)
0 0000 0000; 0 line length
1 1111 1111; 511 lines length (maximum = number of lines/field − 3)
polarity, internally detected odd/even flag O/E
0 = flag unchanged
1 = flag inverted
set lower limit V for colour-keying (8-bit; two’s complement)
1000 0000; as maximum negative value = −128 signal level
0000 0000; limit = 0
0111 1111; as maximum positive value = +127 signal level
set upper limit V for colour-keying (8-bit; two’s complement)
1000 0000; as maximum negative value = −128 signal level
0000 0000; limit = 0
0111 1111; as maximum positive value = +127 signal level
set lower limit V for colour-keying (8-bit; two’s complement)
1000 0000; as maximum negative value = −128 signal level
0000 0000; limit = 0
0111 1111; as maximum positive value = +127 signal level
set upper limit V for colour-keying (8-bit; two’s complement)
1000 0000; as maximum negative value = −128 signal level
0000 0000; limit = 0
0111 1111; as maximum positive value = +127 signal level
VRAM bus output format
0 = enabling of 32 to 16-bit multiplexing via VMUX (pin 46)
1 = disabling of 32 to 16-bit multiplexing via VMUX (pin 46)
adoptive geometrical filter
0 = linear H and V data processing
1 = approximated geometrical H and V interpolation (improved scaling accuracy of
luminance)
luminance limiting value
0 = amplitude range between 1 and 254
1 = amplitude range between 16 and 235, suitable for monochrome and YUV modes
monochrome and two’s complement output data select
0 = inverse gray scale luminance (if gray scale is selected by FIS bits) or straight binary U,
V data output
1 = non-inverse monochrome luminance (if gray scale is selected by FS bits) or two’s
complement U, V data output
line qualifier polarity flag
0 = LNQ is active-LOW (pin 52)
1 = LNQ is active-HIGH
1996 Nov 04
54