SAA7196 Datasheet, PDF (46/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro

Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Table 26 Chrominance saturation control for VRAM port
BIT
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
1
1
1
1
1
.
.
.
.
.
.
.
.
0
1
0
0
0
0
0
0
.
.
.
.
.
.
.
.
0
0
0
0
0
0
0
0
Table 27 Luminance contrast control for VRAM port
BIT
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
1
1
1
1
1
.
.
.
.
.
.
.
.
0
1
0
0
0
0
0
0
.
.
.
.
.
.
.
.
0
0
0
0
0
0
0
0
Table 28 Luminance brightness control for VRAM port
BIT
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
1
1
.
.
.
.
.
.
.
.
1
0
0
0
0
0
0
0
.
.
.
.
.
.
.
.
0
0
0
0
0
0
0
0
Product specification
SAA7196
GAIN
1.999 (maximum saturation)
to
1 (CCIR level)
to
0 (colour off)
GAIN
1.999 (maximum contrast)
to
1 (CCIR level)
to
0 (luminance off)
GAIN
255 (bright)
to
128 (CCIR level)
to
0 (dark)
1996 Nov 04
46