SAA7196 Datasheet, PDF (20/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro

Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Product specification
SAA7196
andbook, full pagew_Lid_Lt_Ch _B
CREFB
HREF
start of
active line
Byte numbers for pixels:
0
1
2
3
4
5
6
7
Y signal
50 Hz
U and V signal
U0
V0
U2
V2
U4
V4
U6
V6
Y signal
60 Hz
U and V signal
0
1
2
3
4
5
6
7
U0
V0
U2
V2
U4
V4
U6
V6
LLCB
CREFB
HREF
Byte numbers for pixels:
Y signal
50 Hz
U and V signal
762
U762
763
V762
764
U764
765
V764
end of
active line
766
767
U766
V766
Y signal
60 Hz
U and V signal
634
U634
635
V634
636
U636
637
V636
638
U638
639
V638
MHA389
1996 Nov 04
Fig.9 Horizontal and data multiplex timing on expansion port.
20