SAA7196 Datasheet, PDF (29/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro

Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Product specification
SAA7196
Table 10 VRAM port output data formats for bits 31 to 16 (continued in Table 11)
EFE-bit = 1 and VOF-bit = 1 (controllable via I²C-bus); burst- and transparent- modes; notes 1 to 3.
PIXEL
OUTPUT
BIT
VRO31
VRO30
VRO29
VRO28
VRO27
VRO26
VRO25
VRO24
VRO23
VRO22
VRO21
VRO20
VRO19
VRO18
VRO17
VRO16
FS1 = 0; FS0 = 0
RGB 5-5-5+α⁽¹⁾
16-BIT WORDS
n n+1 n+2
α
α
α
R4
R4
R4
R3
R3
R3
R2
R2
R2
R1
R1
R1
R0
R0
R0
G4
G4
G4
G3
G3
G3
G2
G2
G2
G1
G1
G1
G0
G0
G0
B4
B4
B4
B3
B3
B3
B2
B2
B2
B1
B1
B1
B0
B0
B0
FS1 = 0; FS0 = 1
YUV 4 : 2 : 2
16-BIT WORDS
n n+1 n+2
Ye7 Yo7 Ye7
Ye6 Yo6 Ye6
Ye5 Yo5 Ye5
Ye4 Yo4 Ye4
Ye3 Yo3 Ye3
Ye2 Yo2 Ye2
Ye1 Yo1 Ye1
Ye0 Yo0 Ye0
Ue7 Ve7 Ue7
Ue6 Ve6 Ue6
Ue5 Ve5 Ue5
Ue4 Ve4 Ue4
Ue3 Ve3 Ue3
Ue2 Ve2 Ue2
Ue1 Ve1 Ue1
Ue0 Ve0 Ue0
FS1 = 1; FS0 = 0
RGB 8-8-8
24-BIT WORDS
n n+1 n+2
R7
R7
R7
R6
R6
R6
R5
R5
R5
R4
R4
R4
R3
R3
R3
R2
R2
R2
R1
R1
R1
R0
R0
R0
G7
G7
G7
G6
G6
G6
G5
G5
G5
G4
G4
G4
G3
G3
G3
G2
G2
G2
G1
G1
G1
G0
G0
G0
FS1 = 1; FS0 = 1
8-bit monochrome
16-BIT WORDS
n n+2 n+4
n+1 n+3 n+5
Ya7 Ya7 Ya7
Ya6 Ya6 Ya6
Ya5 Ya5 Ya5
Ya4 Ya4 Ya4
Ya3 Ya3 Ya3
Ya2 Ya2 Ya2
Ya1 Ya1 Ya1
Ya0 Ya0 Ya0
Yb7 Yb7 Yb7
Yb6 Yb6 Yb6
Yb5 Yb5 Yb5
Yb4 Yb4 Yb4
Yb3 Yb3 Yb3
Yb2 Yb2 Yb2
Yb1 Yb1 Yb1
Yb0 Yb0 Yb0
Notes
1. α = keying bit; R, G, B, Y, U and V = digital signals; e = even pixel number; o = odd pixel number;
a and b = consecutive pixels; O/E = odd/even flag.
2. YUV 16-bit format: the keying signal α is defined only for YU time steps. The corresponding YV sample has also to
be keyed. The α signal in monochrome mode can be used only in the transparent mode (TTR = 1), in this case
Ya = Yb.
3. Data valid only when transparent mode active (bit TTR = 1) and VCLK pin connected to ¹â„₂LLC clock rate.
1996 Nov 04
29