SAA7196 Datasheet, PDF (13/76 Pages) NXP Semiconductors – Digital video decoder, Scaler and Clock generator circuit DESCPro

Philips Semiconductors
Digital video decoder, Scaler and Clock
generator circuit (DESCPro)
Product specification
SAA7196
• Mode 3: YUV15 to YUV0 and HREF/VS terminals are
inputs. External YUV15 to YUV0 is input to the scaler
with HREF/VS reference from external. LLCB/CREFB
clock system of the SAA7196 is used.
pixel wise switching of the scaler source is possible
because the internal clock and sync sources are used.
handbook, full pagewidth
+127
+106
+95
digital
signal
value
reserved
100% white (60 Hz mode)
100% white (50 Hz mode)
luminance
60 Hz mode
luminance
50 Hz mode
0
chrominance
60 Hz mode
chrominance
50 Hz mode
−52
−64
−91
−103
−128
−132
blanking level
black (60 Hz mode)
= black (50 Hz mode)
sync
clipped
MHA380
All levels are related to EBU colour bar. Values in
decimal at 100% luminance and 75% chrominance
amplitude.
Fig.4 CVBS7 to CVBS0 input signal ranges.
1996 Nov 04
13